Commit ea2062dd authored by Tom Chung's avatar Tom Chung Committed by Alex Deucher
Browse files

drm/amd/display: fix the system hang while disable PSR 



[Why]
When the PSR enabled. If you try to adjust the timing parameters,
it may cause system hang. Because the timing mismatch with the
DMCUB settings.

[How]
Disable the PSR before adjusting timing parameters.

Cc: Mario Limonciello <mario.limonciello@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Acked-by: default avatarStylon Wang <stylon.wang@amd.com>
Signed-off-by: default avatarTom Chung <chiahsuan.chung@amd.com>
Reviewed-by: default avatarWayne Lin <Wayne.Lin@amd.com>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent e749dd10

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

+6 −4
Original line number Diff line number Diff line
@@ -8204,6 +8204,12 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state, 
		if (acrtc_state->abm_level != dm_old_crtc_state->abm_level)

			bundle->stream_update.abm_level = &acrtc_state->abm_level;



		mutex_lock(&dm->dc_lock);

		if ((acrtc_state->update_type > UPDATE_TYPE_FAST) &&

				acrtc_state->stream->link->psr_settings.psr_allow_active)

			amdgpu_dm_psr_disable(acrtc_state->stream);

		mutex_unlock(&dm->dc_lock);



		/*

		 * If FreeSync state on the stream has changed then we need to

		 * re-adjust the min/max bounds now that DC doesn't handle this
@@ -8217,10 +8223,6 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state, 
			spin_unlock_irqrestore(&pcrtc->dev->event_lock, flags);

		}

		mutex_lock(&dm->dc_lock);

		if ((acrtc_state->update_type > UPDATE_TYPE_FAST) &&

				acrtc_state->stream->link->psr_settings.psr_allow_active)

			amdgpu_dm_psr_disable(acrtc_state->stream);



		update_planes_and_stream_adapter(dm->dc,

					 acrtc_state->update_type,

					 planes_count,