Unverified Commit ea103bb8 authored by openeuler-ci-bot's avatar openeuler-ci-bot Committed by Gitee
Browse files

!2159 Enable HiSilicon Erratum 162001900 quirk for HIP08/09 

Merge Pull Request from: @cj-xiaocai 
 
Synchronizing mainline patches to fix the issue I798Y2.

Some HiSilicon SMMU PMCG suffers the erratum 162001900 that the PMU disable control sometimes fail to disable the counters. This will lead to error or inaccurate data since before we enable the counters the
counter's still counting for the event used in last perf session.

These patches try to fix this by hardening the global disable process.Before disable the PMU, writing an invalid event type (0xffff) to focibly stop the counters. Correspondingly restore each events on pmu::pmu_enable().

Yicong Yang (2):
  perf/smmuv3: Enable HiSilicon Erratum 162001900 quirk for HIP08/09
  perf/smmuv3: Add MODULE_ALIAS for module auto loading

caijian (1):
  Revert "perf/smmuv3: Enable HiSilicon Erratum quirk"

https://gitee.com/openeuler/kernel/issues/I798Y2 
 
Link:https://gitee.com/openeuler/kernel/pulls/2159

 

Signed-off-by: default avatarJialin Zhang <zhangjialin11@huawei.com>
parents 77d105c4 ca167b78

Documentation/arm64/silicon-errata.rst

+3 −0
Original line number Diff line number Diff line
@@ -147,6 +147,9 @@ stable kernels. 
+----------------+-----------------+-----------------+-----------------------------+

| Hisilicon      | Hip08 SMMU PMCG | #162001800      | N/A                         |

+----------------+-----------------+-----------------+-----------------------------+

| Hisilicon      | Hip08 SMMU PMCG | #162001900      | N/A                         |

|                | Hip09 SMMU PMCG |                 |                             |

+----------------+-----------------+-----------------+-----------------------------+

| Hisilicon      | TSV{110,200}    | #1980005        | HISILICON_ERRATUM_1980005   |

+----------------+-----------------+-----------------+-----------------------------+

| Hisilicon      | Hip09           | #162100801      | HISILICON_ERRATUM_162100801 |

drivers/acpi/arm64/iort.c

+1 −1
Original line number Diff line number Diff line
@@ -1477,7 +1477,7 @@ static void __init arm_smmu_v3_pmcg_init_resources(struct resource *res, 
static struct acpi_platform_list pmcg_plat_info[] __initdata = {

	/* HiSilicon Hip08 Platform */

	{"HISI  ", "HIP08   ", 0, ACPI_SIG_IORT, greater_than_or_equal,

	 "Erratum #162001800", IORT_SMMU_V3_PMCG_HISI_HIP08},

	 "Erratum #162001800, Erratum #162001900", IORT_SMMU_V3_PMCG_HISI_HIP08},

	/* HiSilicon Hip09 Platform */

	{"HISI  ", "HIP09   ", 0, ACPI_SIG_IORT, greater_than_or_equal,

	 "Erratum #162001900", IORT_SMMU_V3_PMCG_HISI_HIP09},

drivers/perf/arm_smmuv3_pmu.c

+38 −13
Original line number Diff line number Diff line
@@ -96,7 +96,7 @@ 
#define SMMU_PMCG_PA_SHIFT              12



#define SMMU_PMCG_EVCNTR_RDONLY         BIT(0)

#define SMMU_PMCG_DISABLE_HARDEN        BIT(1)

#define SMMU_PMCG_HARDEN_DISABLE        BIT(1)



static int cpuhp_state_num;
@@ -141,30 +141,44 @@ static inline void smmu_pmu_enable(struct pmu *pmu) 
	writel(SMMU_PMCG_CR_ENABLE, smmu_pmu->reg_base + SMMU_PMCG_CR);

}



static inline void smmu_pmu_disable_harden(struct smmu_pmu *smmu_pmu)

static int smmu_pmu_apply_event_filter(struct smmu_pmu *smmu_pmu,

				       struct perf_event *event, int idx);



static inline void smmu_pmu_enable_quirk_hip08_09(struct pmu *pmu)

{

	struct smmu_pmu *smmu_pmu = to_smmu_pmu(pmu);

	unsigned int idx;



	/*

	 * The global disable of PMU sometimes fail to stop the counting.

	 * Harden this by writing an invalid event type to each used counter

	 * to forcibly stop counting.

	 */

	for_each_set_bit(idx, smmu_pmu->used_counters, smmu_pmu->num_counters)

		writel(0xffff, smmu_pmu->reg_base + SMMU_PMCG_EVTYPER(idx));

		smmu_pmu_apply_event_filter(smmu_pmu, smmu_pmu->events[idx], idx);



	smmu_pmu_enable(pmu);

}



static inline void smmu_pmu_disable(struct pmu *pmu)

{

	struct smmu_pmu *smmu_pmu = to_smmu_pmu(pmu);



	if (smmu_pmu->options & SMMU_PMCG_DISABLE_HARDEN)

		smmu_pmu_disable_harden(smmu_pmu);



	writel(0, smmu_pmu->reg_base + SMMU_PMCG_CR);

	writel(0, smmu_pmu->reg_base + SMMU_PMCG_IRQ_CTRL);

}



static inline void smmu_pmu_disable_quirk_hip08_09(struct pmu *pmu)

{

	struct smmu_pmu *smmu_pmu = to_smmu_pmu(pmu);

	unsigned int idx;



	/*

	 * The global disable of PMU sometimes fail to stop the counting.

	 * Harden this by writing an invalid event type to each used counter

	 * to forcibly stop counting.

	 */

	for_each_set_bit(idx, smmu_pmu->used_counters, smmu_pmu->num_counters)

		writel(0xffff, smmu_pmu->reg_base + SMMU_PMCG_EVTYPER(idx));



	smmu_pmu_disable(pmu);

}



static inline void smmu_pmu_counter_set_value(struct smmu_pmu *smmu_pmu,

					      u32 idx, u64 value)

{
@@ -773,10 +787,10 @@ static void smmu_pmu_get_acpi_options(struct smmu_pmu *smmu_pmu) 
	switch (model) {

	case IORT_SMMU_V3_PMCG_HISI_HIP08:

		/* HiSilicon Erratum 162001800 */

		smmu_pmu->options |= SMMU_PMCG_EVCNTR_RDONLY | SMMU_PMCG_DISABLE_HARDEN;

		smmu_pmu->options |= SMMU_PMCG_EVCNTR_RDONLY | SMMU_PMCG_HARDEN_DISABLE;

		break;

	case IORT_SMMU_V3_PMCG_HISI_HIP09:

		smmu_pmu->options |= SMMU_PMCG_DISABLE_HARDEN;

		smmu_pmu->options |= SMMU_PMCG_HARDEN_DISABLE;

		break;

	}
@@ -865,6 +879,16 @@ static int smmu_pmu_probe(struct platform_device *pdev) 


	smmu_pmu_get_acpi_options(smmu_pmu);



	/*

	 * For platforms suffer this quirk, the PMU disable sometimes fails to

	 * stop the counters. This will leads to inaccurate or error counting.

	 * Forcibly disable the counters with these quirk handler.

	 */

	if (smmu_pmu->options & SMMU_PMCG_HARDEN_DISABLE) {

		smmu_pmu->pmu.pmu_enable = smmu_pmu_enable_quirk_hip08_09;

		smmu_pmu->pmu.pmu_disable = smmu_pmu_disable_quirk_hip08_09;

	}



	/* Pick one CPU to be the preferred one to use */

	smmu_pmu->on_cpu = raw_smp_processor_id();

	WARN_ON(irq_set_affinity(smmu_pmu->irq, cpumask_of(smmu_pmu->on_cpu)));
@@ -950,6 +974,7 @@ static void __exit arm_smmu_pmu_exit(void) 


module_exit(arm_smmu_pmu_exit);



MODULE_ALIAS("platform:arm-smmu-v3-pmcg");

MODULE_DESCRIPTION("PMU driver for ARM SMMUv3 Performance Monitors Extension");

MODULE_AUTHOR("Neil Leeder <nleeder@codeaurora.org>");

MODULE_AUTHOR("Shameer Kolothum <shameerali.kolothum.thodi@huawei.com>");