Commit e9bdc3d4 authored by Janusz Krzysztofik's avatar Janusz Krzysztofik Committed by Arnd Bergmann
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ARM: OMAP1: clock: Remove noop code 



There are some OMAP1 clock code bits that have no effect:
- crystal_type variable is set to 0 but never changed, then
  crystal_type == 2 condition is never true and ck_ref.rate never set to
  19200000,
- clk->ops->allow_idle() is called from omap_clk_enable_autoidle_all() but
  that op is not configured for any clock, then the function does nothing
  and the op field is not needed,
- ENABLE_ON_INIT flag is set for some clocks but is never checked by any
  code, then not needed.
Drop that code.

Signed-off-by: default avatarJanusz Krzysztofik <jmkrzyszt@gmail.com>
Acked-by: default avatarTony Lindgren <tony@atomide.com>
Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parent 6bdfc9be

arch/arm/mach-omap1/clock.c

+0 −17
Original line number Diff line number Diff line
@@ -798,22 +798,6 @@ void clk_unregister(struct clk *clk) 
}

EXPORT_SYMBOL(clk_unregister);



int omap_clk_enable_autoidle_all(void)

{

	struct clk *c;

	unsigned long flags;



	spin_lock_irqsave(&clockfw_lock, flags);



	list_for_each_entry(c, &clocks, node)

		if (c->ops->allow_idle)

			c->ops->allow_idle(c);



	spin_unlock_irqrestore(&clockfw_lock, flags);



	return 0;

}



/*

 * Low level helpers

 */
@@ -871,7 +855,6 @@ static int __init clk_disable_unused(void) 
	return 0;

}

late_initcall(clk_disable_unused);

late_initcall(omap_clk_enable_autoidle_all);

#endif



#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS)

arch/arm/mach-omap1/clock.h

+0 −3
Original line number Diff line number Diff line
@@ -53,7 +53,6 @@ struct omap_clk { 
struct clkops {

	int			(*enable)(struct clk *);

	void			(*disable)(struct clk *);

	void			(*allow_idle)(struct clk *);

};



/*
@@ -64,7 +63,6 @@ struct clkops { 
#define ENABLE_REG_32BIT	(1 << 0)	/* Use 32-bit access */

#define CLOCK_IDLE_CONTROL	(1 << 1)

#define CLOCK_NO_IDLE_PARENT	(1 << 2)

#define ENABLE_ON_INIT		(1 << 3)	/* Enable upon framework init */



/**

 * struct clk - OMAP struct clk
@@ -135,7 +133,6 @@ extern void clk_unregister(struct clk *clk); 
extern void propagate_rate(struct clk *clk);

extern unsigned long followparent_recalc(struct clk *clk);

unsigned long omap_fixed_divisor_recalc(struct clk *clk);

extern int omap_clk_enable_autoidle_all(void);



extern const struct clkops clkops_null;

arch/arm/mach-omap1/clock_data.c

+1 −7
Original line number Diff line number Diff line
@@ -92,8 +92,7 @@ static struct arm_idlect1_clk ck_dpll1out = { 
		.name		= "ck_dpll1out",

		.ops		= &clkops_generic,

		.parent		= &ck_dpll1,

		.flags		= CLOCK_IDLE_CONTROL | ENABLE_REG_32BIT |

				  ENABLE_ON_INIT,

		.flags		= CLOCK_IDLE_CONTROL | ENABLE_REG_32BIT,

		.enable_reg	= OMAP1_IO_ADDRESS(ARM_IDLECT2),

		.enable_bit	= EN_CKOUT_ARM,

		.recalc		= &followparent_recalc,
@@ -146,7 +145,6 @@ static struct clk arm_gpio_ck = { 
	.name		= "ick",

	.ops		= &clkops_generic,

	.parent		= &ck_dpll1,

	.flags		= ENABLE_ON_INIT,

	.enable_reg	= OMAP1_IO_ADDRESS(ARM_IDLECT2),

	.enable_bit	= EN_GPIOCK,

	.recalc		= &followparent_recalc,
@@ -316,7 +314,6 @@ static struct clk tc2_ck = { 
	.name		= "tc2_ck",

	.ops		= &clkops_generic,

	.parent		= &tc_ck.clk,

	.flags		= ENABLE_ON_INIT,

	.enable_reg	= OMAP1_IO_ADDRESS(ARM_IDLECT3),

	.enable_bit	= EN_TC2_CK,

	.recalc		= &followparent_recalc,
@@ -762,7 +759,6 @@ u32 cpu_mask; 
int __init omap1_clk_init(void)

{

	struct omap_clk *c;

	int crystal_type = 0; /* Default 12 MHz */

	u32 reg;



#ifdef CONFIG_DEBUG_LL
@@ -810,8 +806,6 @@ int __init omap1_clk_init(void) 


	if (cpu_is_omap7xx())

		ck_ref.rate = 13000000;

	if (cpu_is_omap16xx() && crystal_type == 2)

		ck_ref.rate = 19200000;



	pr_info("Clocks: ARM_SYSST: 0x%04x DPLL_CTL: 0x%04x ARM_CKCTL: 0x%04x\n",

		omap_readw(ARM_SYSST), omap_readw(DPLL_CTL),