Commit e97978e8 authored Sep 21, 2020 by Charlene Liu Committed by Alex Deucher Nov 24, 2020

drm/amd/display: add i2c speed arbitration for dc_i2c and hdcp_i2c



[why]
HDCP 1.4 failed on SL8800 SW w/a test driver use.

[how]
slower down the HW i2c speed when used by HW i2c.
this request: each acquired_i2c_engine setup the i2c speed needed.
and set the I2c engine for HDCP use at release_engine.

this covers SW using HW I2c engine and HDCP using HW I2c engine. for
dmcu using HW I2c engine, needs add similar logic in dmcufw.

Signed-off-by: Charlene Liu <Charlene.Liu@amd.com>
Reviewed-by: Chris Park <Chris.Park@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

parent a2a8857c

drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c

+1 −0

Original line number	Diff line number	Diff line
		@@ -1759,6 +1759,7 @@ static bool dcn301_resource_construct(
		pool->base.mpcc_count = pool->base.res_cap->num_timing_generator;
		dc->caps.max_downscale_ratio = 600;
		dc->caps.i2c_speed_in_khz = 100;
		dc->caps.i2c_speed_in_khz_hdcp = 5; /1.4 w/a enabled by default/
		dc->caps.max_cursor_size = 256;
		dc->caps.dmdata_alloc_size = 2048;
		dc->caps.max_slave_planes = 1;

drivers/gpu/drm/amd/display/dc/dcn302/dcn302_resource.c

+1 −0

Original line number	Diff line number	Diff line
		@@ -1307,6 +1307,7 @@ static bool dcn302_resource_construct(
		pool->mpcc_count = pool->res_cap->num_timing_generator;
		dc->caps.max_downscale_ratio = 600;
		dc->caps.i2c_speed_in_khz = 100;
		dc->caps.i2c_speed_in_khz_hdcp = 5; /1.4 w/a applied by derfault/
		dc->caps.max_cursor_size = 256;
		dc->caps.dmdata_alloc_size = 2048;