Commit e9757553 authored by Mark Brown's avatar Mark Brown Committed by Will Deacon
Browse files

arm64/mte: Standardise GMID field name definitions 



Usually our defines for bitfields in system registers do not include a SYS_
prefix but those for GMID do. In preparation for automatic generation of
defines remove that prefix. No functional change.

Signed-off-by: default avatarMark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20220704170302.2609529-9-broonie@kernel.org


Signed-off-by: default avatarWill Deacon <will@kernel.org>
parent bacf3085

arch/arm64/include/asm/sysreg.h

+2 −2
Original line number Diff line number Diff line
@@ -1136,8 +1136,8 @@ 
#define SYS_RGSR_EL1_SEED_MASK	0xffffUL



/* GMID_EL1 field definitions */

#define SYS_GMID_EL1_BS_SHIFT	0

#define SYS_GMID_EL1_BS_SIZE	4

#define GMID_EL1_BS_SHIFT	0

#define GMID_EL1_BS_SIZE	4



/* TFSR{,E0}_EL1 bit definitions */

#define SYS_TFSR_EL1_TF0_SHIFT	0

arch/arm64/kernel/cpufeature.c

+1 −1
Original line number Diff line number Diff line
@@ -459,7 +459,7 @@ static const struct arm64_ftr_bits ftr_dczid[] = { 
};



static const struct arm64_ftr_bits ftr_gmid[] = {

	ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, SYS_GMID_EL1_BS_SHIFT, 4, 0),

	ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, GMID_EL1_BS_SHIFT, 4, 0),

	ARM64_FTR_END,

};

arch/arm64/lib/mte.S

+1 −1
Original line number Diff line number Diff line
@@ -18,7 +18,7 @@ 
 */

	.macro	multitag_transfer_size, reg, tmp

	mrs_s	\reg, SYS_GMID_EL1

	ubfx	\reg, \reg, #SYS_GMID_EL1_BS_SHIFT, #SYS_GMID_EL1_BS_SIZE

	ubfx	\reg, \reg, #GMID_EL1_BS_SHIFT, #GMID_EL1_BS_SIZE

	mov	\tmp, #4

	lsl	\reg, \tmp, \reg

	.endm