Commit e952c2eb authored by Yang Yingliang's avatar Yang Yingliang Committed by Chen Jun
Browse files

irqchip/mbigen: rename register marcros 



hulk inclusion
category: feature
bugzilla: 46791
CVE: N/A

-------------------------------------------------

A MBIGEN can also be used for generating SPIs, so let's
rename register macros to make them more resonable.

The first 64-pins of MBIGEN is used by SPIs, so rename
RESERVED_IRQ_PER_MBIGEN_CHIP to SPI_NUM_PER_MBIGEN_CHIP
and change the comment for this marcro.

Signed-off-by: default avatarYang Yingliang <yangyingliang@huawei.com>
Reviewed-by: default avatarHanjun Guo <guohanjun@huawei.com>
Signed-off-by: default avatarzhangyi (F) <yi.zhang@huawei.com>
Acked-by: default avatarXie XiuQi <xiexiuqi@huawei.com>
Signed-off-by: default avatarChen Jun <chenjun102@huawei.com>
parent 28176920

drivers/irqchip/irq-mbigen.c

+10 −10
Original line number Diff line number Diff line
@@ -19,14 +19,14 @@ 
/* Interrupt numbers per mbigen node supported */

#define IRQS_PER_MBIGEN_NODE		128



/* 64 irqs (Pin0-pin63) are reserved for each mbigen chip */

#define RESERVED_IRQ_PER_MBIGEN_CHIP	64

/* 64 irqs (Pin0-pin63) are used for SPIs on each mbigen chip */

#define SPI_NUM_PER_MBIGEN_CHIP	64



/* The maximum IRQ pin number of mbigen chip(start from 0) */

#define MAXIMUM_IRQ_PIN_NUM		1407



/**

 * In mbigen vector register

 * In mbigen lpi vector register

 * bit[21:12]:	event id value

 * bit[11:0]:	device id

 */
@@ -37,7 +37,7 @@ 
#define MBIGEN_NODE_OFFSET		0x1000



/* offset of vector register in mbigen node */

#define REG_MBIGEN_VEC_OFFSET		0x200

#define REG_MBIGEN_LPI_VEC_OFFSET	0x200



/**

 * offset of clear register in mbigen node
@@ -51,7 +51,7 @@ 
 * This register is used to configure interrupt

 * trigger type

 */

#define REG_MBIGEN_TYPE_OFFSET		0x0

#define REG_MBIGEN_LPI_TYPE_OFFSET	0x0



/**

 * struct mbigen_device - holds the information of mbigen device.
@@ -68,12 +68,12 @@ static inline unsigned int get_mbigen_vec_reg(irq_hw_number_t hwirq) 
{

	unsigned int nid, pin;



	hwirq -= RESERVED_IRQ_PER_MBIGEN_CHIP;

	hwirq -= SPI_NUM_PER_MBIGEN_CHIP;

	nid = hwirq / IRQS_PER_MBIGEN_NODE + 1;

	pin = hwirq % IRQS_PER_MBIGEN_NODE;



	return pin * 4 + nid * MBIGEN_NODE_OFFSET

			+ REG_MBIGEN_VEC_OFFSET;

			+ REG_MBIGEN_LPI_VEC_OFFSET;

}



static inline void get_mbigen_type_reg(irq_hw_number_t hwirq,
@@ -81,7 +81,7 @@ static inline void get_mbigen_type_reg(irq_hw_number_t hwirq, 
{

	unsigned int nid, irq_ofst, ofst;



	hwirq -= RESERVED_IRQ_PER_MBIGEN_CHIP;

	hwirq -= SPI_NUM_PER_MBIGEN_CHIP;

	nid = hwirq / IRQS_PER_MBIGEN_NODE + 1;

	irq_ofst = hwirq % IRQS_PER_MBIGEN_NODE;
@@ -89,7 +89,7 @@ static inline void get_mbigen_type_reg(irq_hw_number_t hwirq, 
	ofst = irq_ofst / 32 * 4;



	*addr = ofst + nid * MBIGEN_NODE_OFFSET

		+ REG_MBIGEN_TYPE_OFFSET;

		+ REG_MBIGEN_LPI_TYPE_OFFSET;

}



static inline void get_mbigen_clear_reg(irq_hw_number_t hwirq,
@@ -175,7 +175,7 @@ static int mbigen_domain_translate(struct irq_domain *d, 
			return -EINVAL;



		if ((fwspec->param[0] > MAXIMUM_IRQ_PIN_NUM) ||

			(fwspec->param[0] < RESERVED_IRQ_PER_MBIGEN_CHIP))

			(fwspec->param[0] < SPI_NUM_PER_MBIGEN_CHIP))

			return -EINVAL;

		else

			*hwirq = fwspec->param[0];