Commit e929e3da authored by Maor Dickman's avatar Maor Dickman Committed by Saeed Mahameed
Browse files

net/mlx5: E-switch, Create vport miss group only if src rewrite is supported 



Create send to vport miss group was added in order to support traffic
recirculation to root table with metadata source rewrite.
This group is created also in case source rewrite isn't supported.

Fixed by creating send to vport miss group only if source rewrite is
supported by FW.

Fixes: 8e404fef ("net/mlx5e: Match recirculated packet miss in slow table using reg_c1")
Signed-off-by: default avatarMaor Dickman <maord@nvidia.com>
Reviewed-by: default avatarVlad Buslov <vladbu@nvidia.com>
Reviewed-by: default avatarRoi Dayan <roid@nvidia.com>
Signed-off-by: default avatarSaeed Mahameed <saeedm@nvidia.com>
parent 3211434d

drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c

+39 −29
Original line number Diff line number Diff line
@@ -537,6 +537,14 @@ esw_setup_vport_dests(struct mlx5_flow_destination *dest, struct mlx5_flow_act * 
	return i;

}



static bool

esw_src_port_rewrite_supported(struct mlx5_eswitch *esw)

{

	return MLX5_CAP_GEN(esw->dev, reg_c_preserve) &&

	       mlx5_eswitch_vport_match_metadata_enabled(esw) &&

	       MLX5_CAP_ESW_FLOWTABLE_FDB(esw->dev, ignore_flow_level);

}



static int

esw_setup_dests(struct mlx5_flow_destination *dest,

		struct mlx5_flow_act *flow_act,
@@ -550,9 +558,7 @@ esw_setup_dests(struct mlx5_flow_destination *dest, 
	int err = 0;



	if (!mlx5_eswitch_termtbl_required(esw, attr, flow_act, spec) &&

	    MLX5_CAP_GEN(esw_attr->in_mdev, reg_c_preserve) &&

	    mlx5_eswitch_vport_match_metadata_enabled(esw) &&

	    MLX5_CAP_ESW_FLOWTABLE_FDB(esw->dev, ignore_flow_level))

	    esw_src_port_rewrite_supported(esw))

		attr->flags |= MLX5_ESW_ATTR_FLAG_SRC_REWRITE;



	if (attr->dest_ft) {
@@ -1716,6 +1722,7 @@ static int esw_create_offloads_fdb_tables(struct mlx5_eswitch *esw) 
	}

	esw->fdb_table.offloads.send_to_vport_grp = g;



	if (esw_src_port_rewrite_supported(esw)) {

		/* meta send to vport */

		memset(flow_group_in, 0, inlen);

		MLX5_SET(create_flow_group_in, flow_group_in, match_criteria_enable,
@@ -1724,14 +1731,16 @@ static int esw_create_offloads_fdb_tables(struct mlx5_eswitch *esw) 
		match_criteria = MLX5_ADDR_OF(create_flow_group_in, flow_group_in, match_criteria);



		MLX5_SET(fte_match_param, match_criteria,

		 misc_parameters_2.metadata_reg_c_0, mlx5_eswitch_get_vport_metadata_mask());

			 misc_parameters_2.metadata_reg_c_0,

			 mlx5_eswitch_get_vport_metadata_mask());

		MLX5_SET(fte_match_param, match_criteria,

			 misc_parameters_2.metadata_reg_c_1, ESW_TUN_MASK);



		num_vfs = esw->esw_funcs.num_vfs;

		if (num_vfs) {

			MLX5_SET(create_flow_group_in, flow_group_in, start_flow_index, ix);

		MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index, ix + num_vfs - 1);

			MLX5_SET(create_flow_group_in, flow_group_in,

				 end_flow_index, ix + num_vfs - 1);

			ix += num_vfs;



			g = mlx5_create_flow_group(fdb, flow_group_in);
@@ -1747,6 +1756,7 @@ static int esw_create_offloads_fdb_tables(struct mlx5_eswitch *esw) 
			if (err)

				goto meta_rule_err;

		}

	}



	if (MLX5_CAP_ESW(esw->dev, merged_eswitch)) {

		/* create peer esw miss group */