Commit e92453b9 authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch 'hns3-next' 



Guangbin Huang says:

====================
net: hns3: updates for -next

This series includes some updates for the HNS3 ethernet driver.

Change logs:
V1 -> V2:
 - Fix failed to apply to net-next problem.
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents e97e917b 29c17cb6

drivers/net/ethernet/hisilicon/hns3/hclge_mbx.h

+13 −4
Original line number Diff line number Diff line
@@ -135,11 +135,20 @@ struct hclge_vf_to_pf_msg { 


struct hclge_pf_to_vf_msg {

	u16 code;

	union {

		/* used for mbx response */

		struct {

			u16 vf_mbx_msg_code;

			u16 vf_mbx_msg_subcode;

			u16 resp_status;

			u8 resp_data[HCLGE_MBX_MAX_RESP_DATA_SIZE];

		};

		/* used for general mbx */

		struct {

			u8 msg_data[HCLGE_MBX_MAX_MSG_SIZE];

		};

	};

};



struct hclge_mbx_vf_to_pf_cmd {

	u8 rsv;

drivers/net/ethernet/hisilicon/hns3/hnae3.h

+4 −0
Original line number Diff line number Diff line
@@ -96,6 +96,7 @@ enum HNAE3_DEV_CAP_BITS { 
	HNAE3_DEV_SUPPORT_PORT_VLAN_BYPASS_B,

	HNAE3_DEV_SUPPORT_VLAN_FLTR_MDF_B,

	HNAE3_DEV_SUPPORT_MC_MAC_MNG_B,

	HNAE3_DEV_SUPPORT_CQ_B,

};



#define hnae3_dev_fd_supported(hdev) \
@@ -155,6 +156,9 @@ enum HNAE3_DEV_CAP_BITS { 
#define hnae3_ae_dev_mc_mac_mng_supported(ae_dev) \

	test_bit(HNAE3_DEV_SUPPORT_MC_MAC_MNG_B, (ae_dev)->caps)



#define hnae3_ae_dev_cq_supported(ae_dev) \

	test_bit(HNAE3_DEV_SUPPORT_CQ_B, (ae_dev)->caps)



enum HNAE3_PF_CAP_BITS {

	HNAE3_PF_SUPPORT_VLAN_FLTR_MDF_B = 0,

};

drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.c

+2 −0
Original line number Diff line number Diff line
@@ -149,6 +149,7 @@ static const struct hclge_comm_caps_bit_map hclge_pf_cmd_caps[] = { 
	{HCLGE_COMM_CAP_PORT_VLAN_BYPASS_B,

	 HNAE3_DEV_SUPPORT_PORT_VLAN_BYPASS_B},

	{HCLGE_COMM_CAP_PORT_VLAN_BYPASS_B, HNAE3_DEV_SUPPORT_VLAN_FLTR_MDF_B},

	{HCLGE_COMM_CAP_CQ_B, HNAE3_DEV_SUPPORT_CQ_B},

};



static const struct hclge_comm_caps_bit_map hclge_vf_cmd_caps[] = {
@@ -160,6 +161,7 @@ static const struct hclge_comm_caps_bit_map hclge_vf_cmd_caps[] = { 
	{HCLGE_COMM_CAP_QB_B, HNAE3_DEV_SUPPORT_QB_B},

	{HCLGE_COMM_CAP_TX_PUSH_B, HNAE3_DEV_SUPPORT_TX_PUSH_B},

	{HCLGE_COMM_CAP_RXD_ADV_LAYOUT_B, HNAE3_DEV_SUPPORT_RXD_ADV_LAYOUT_B},

	{HCLGE_COMM_CAP_CQ_B, HNAE3_DEV_SUPPORT_CQ_B},

};



static void

drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.h

+1 −0
Original line number Diff line number Diff line
@@ -338,6 +338,7 @@ enum HCLGE_COMM_CAP_BITS { 
	HCLGE_COMM_CAP_PAUSE_B = 14,

	HCLGE_COMM_CAP_RXD_ADV_LAYOUT_B = 15,

	HCLGE_COMM_CAP_PORT_VLAN_BYPASS_B = 17,

	HCLGE_COMM_CAP_CQ_B = 18,

};



enum HCLGE_COMM_API_CAP_BITS {

drivers/net/ethernet/hisilicon/hns3/hns3_enet.c

+1 −4
Original line number Diff line number Diff line
@@ -5159,10 +5159,7 @@ static void hns3_set_cq_period_mode(struct hns3_nic_priv *priv, 
			priv->tqp_vector[i].rx_group.dim.mode = mode;

	}



	/* only device version above V3(include V3), GL can switch CQ/EQ

	 * period mode.

	 */

	if (ae_dev->dev_version >= HNAE3_DEVICE_VERSION_V3) {

	if (hnae3_ae_dev_cq_supported(ae_dev)) {

		u32 new_mode;

		u64 reg;