Commit e8d61bdf authored Mar 08, 2022 by Peter Zijlstra

x86/ibt,sev: Annotations



No IBT on AMD so far.. probably correct, who knows.

Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Acked-by: Josh Poimboeuf <jpoimboe@redhat.com>
Link: https://lore.kernel.org/r/20220308154318.995109889@infradead.org

parent 3215de84

arch/x86/entry/entry_64.S

+1 −0

Original line number	Diff line number	Diff line
		@@ -95,6 +95,7 @@ SYM_CODE_START(entry_SYSCALL_64)
		movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp

		SYM_INNER_LABEL(entry_SYSCALL_64_safe_stack, SYM_L_GLOBAL)
		ANNOTATE_NOENDBR

		/* Construct struct pt_regs on stack */
		pushq $__USER_DS /* pt_regs->ss */

arch/x86/entry/entry_64_compat.S

+1 −0

Original line number	Diff line number	Diff line
		@@ -214,6 +214,7 @@ SYM_CODE_START(entry_SYSCALL_compat)
		movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp

		SYM_INNER_LABEL(entry_SYSCALL_compat_safe_stack, SYM_L_GLOBAL)
		ANNOTATE_NOENDBR

		/* Construct struct pt_regs on stack */
		pushq $__USER32_DS /* pt_regs->ss */

arch/x86/kernel/head_64.S

+2 −0

Original line number	Diff line number	Diff line
		@@ -332,6 +332,7 @@ SYM_CODE_END(start_cpu0)
		*/
		SYM_CODE_START_NOALIGN(vc_boot_ghcb)
		UNWIND_HINT_IRET_REGS offset=8
		ENDBR

		/* Build pt_regs */
		PUSH_AND_CLEAR_REGS
		@@ -439,6 +440,7 @@ SYM_CODE_END(early_idt_handler_common)
		*/
		SYM_CODE_START_NOALIGN(vc_no_ghcb)
		UNWIND_HINT_IRET_REGS offset=8
		ENDBR

		/* Build pt_regs */
		PUSH_AND_CLEAR_REGS