Commit e8bead9c authored by Deepak Rawat's avatar Deepak Rawat Committed by Roland Scheidegger
Browse files

drm/vmwgfx: Add support for streamoutput with mob commands 



With SM5 capability a new version of streamoutput is supported by device
which need backing mob and a new field. With this change the new command
is supported in command buffer.

v2: Also track streamoutput context binding in binding manager.

v3: Track only one streamoutput as only one can be set to context.
v4: Fix comment typos

Signed-off-by: default avatarDeepak Rawat <drawat.floss@gmail.com>
Signed-off-by: default avatarNeha Bhende <bhenden@vmware.com>
Reviewed-by: default avatarThomas Hellström (VMware) <thomas_os@shipmail.org>
Reviewed-by: default avatarRoland Scheidegger <sroland@vmware.com>
Signed-off-by: default avatarRoland Scheidegger <sroland@vmware.com>
parent 403fef50

drivers/gpu/drm/vmwgfx/Makefile

+1 −1
Original line number Diff line number Diff line
@@ -8,7 +8,7 @@ vmwgfx-y := vmwgfx_execbuf.o vmwgfx_gmr.o vmwgfx_kms.o vmwgfx_drv.o \ 
	    vmwgfx_cmdbuf_res.o vmwgfx_cmdbuf.o vmwgfx_stdu.o \

	    vmwgfx_cotable.o vmwgfx_so.o vmwgfx_binding.o vmwgfx_msg.o \

	    vmwgfx_simple_resource.o vmwgfx_va.o vmwgfx_blit.o \

	    vmwgfx_validation.o vmwgfx_page_dirty.o \

	    vmwgfx_validation.o vmwgfx_page_dirty.o vmwgfx_streamoutput.o \

	    ttm_object.o ttm_lock.o



obj-$(CONFIG_DRM_VMWGFX) := vmwgfx.o

drivers/gpu/drm/vmwgfx/vmwgfx_binding.c

+38 −1
Original line number Diff line number Diff line
@@ -78,6 +78,7 @@ 
 * @index_buffer: Index buffer binding.

 * @per_shader: Per shader-type bindings.

 * @ua_views: UAV bindings.

 * @so_state: StreamOutput bindings.

 * @dirty: Bitmap tracking per binding-type changes that have not yet

 * been emitted to the device.

 * @dirty_vb: Bitmap tracking individual vertex buffer binding changes that
@@ -103,6 +104,7 @@ struct vmw_ctx_binding_state { 
	struct vmw_ctx_bindinfo_ib index_buffer;

	struct vmw_dx_shader_bindings per_shader[SVGA3D_NUM_SHADERTYPE];

	struct vmw_ctx_bindinfo_uav ua_views[VMW_MAX_UAV_BIND_TYPE];

	struct vmw_ctx_bindinfo_so so_state;



	unsigned long dirty;

	DECLARE_BITMAP(dirty_vb, SVGA3D_DX_MAX_VERTEXBUFFERS);
@@ -127,6 +129,7 @@ static int vmw_binding_scrub_ib(struct vmw_ctx_bindinfo *bi, bool rebind); 
static int vmw_binding_scrub_vb(struct vmw_ctx_bindinfo *bi, bool rebind);

static int vmw_binding_scrub_uav(struct vmw_ctx_bindinfo *bi, bool rebind);

static int vmw_binding_scrub_cs_uav(struct vmw_ctx_bindinfo *bi, bool rebind);

static int vmw_binding_scrub_so(struct vmw_ctx_bindinfo *bi, bool rebind);



static void vmw_binding_build_asserts(void) __attribute__ ((unused));
@@ -202,6 +205,9 @@ static const size_t vmw_binding_uav_offsets[] = { 
static const size_t vmw_binding_cs_uav_offsets[] = {

	offsetof(struct vmw_ctx_binding_state, ua_views[1].views),

};

static const size_t vmw_binding_so_offsets[] = {

	offsetof(struct vmw_ctx_binding_state, so_state),

};



static const struct vmw_binding_info vmw_binding_infos[] = {

	[vmw_ctx_binding_shader] = {
@@ -256,6 +262,10 @@ static const struct vmw_binding_info vmw_binding_infos[] = { 
		.size = sizeof(struct vmw_ctx_bindinfo_view),

		.offsets = vmw_binding_cs_uav_offsets,

		.scrub_func = vmw_binding_scrub_cs_uav},

	[vmw_ctx_binding_so] = {

		.size = sizeof(struct vmw_ctx_bindinfo_so),

		.offsets = vmw_binding_so_offsets,

		.scrub_func = vmw_binding_scrub_so},

};



/**
@@ -1290,6 +1300,33 @@ static int vmw_binding_scrub_cs_uav(struct vmw_ctx_bindinfo *bi, bool rebind) 
	return 0;

}



/**

 * vmw_binding_scrub_so - Scrub a streamoutput binding from context.

 * @bi: Single binding information.

 * @rebind: Whether to issue a bind instead of scrub command.

 */

static int vmw_binding_scrub_so(struct vmw_ctx_bindinfo *bi, bool rebind)

{

	struct vmw_ctx_bindinfo_so *binding =

		container_of(bi, typeof(*binding), bi);

	struct vmw_private *dev_priv = bi->ctx->dev_priv;

	struct {

		SVGA3dCmdHeader header;

		SVGA3dCmdDXSetStreamOutput body;

	} *cmd;



	cmd = VMW_FIFO_RESERVE_DX(dev_priv, sizeof(*cmd), bi->ctx->id);

	if (!cmd)

		return -ENOMEM;



	cmd->header.id = SVGA_3D_CMD_DX_SET_STREAMOUTPUT;

	cmd->header.size = sizeof(cmd->body);

	cmd->body.soid = rebind ? bi->res->id : SVGA3D_INVALID_ID;

	vmw_fifo_commit(dev_priv, sizeof(*cmd));



	return 0;

}



/**

 * vmw_binding_state_alloc - Allocate a struct vmw_ctx_binding_state with

 * memory accounting.
@@ -1393,7 +1430,7 @@ u32 vmw_binding_dirtying(enum vmw_ctx_binding_type binding_type) 
	};



	/* Review this function as new bindings are added. */

	BUILD_BUG_ON(vmw_ctx_binding_max != 13);

	BUILD_BUG_ON(vmw_ctx_binding_max != 14);

	return is_binding_dirtying[binding_type];

}

drivers/gpu/drm/vmwgfx/vmwgfx_binding.h

+11 −0
Original line number Diff line number Diff line
@@ -55,6 +55,7 @@ enum vmw_ctx_binding_type { 
	vmw_ctx_binding_ib,

	vmw_ctx_binding_uav,

	vmw_ctx_binding_cs_uav,

	vmw_ctx_binding_so,

	vmw_ctx_binding_max

};
@@ -203,6 +204,16 @@ struct vmw_ctx_bindinfo_uav { 
	uint32 index;

};



/**

 * struct vmw_ctx_bindinfo_so - Stream output binding metadata.

 * @bi: struct vmw_ctx_bindinfo we derive from.

 * @slot: Device data used to reconstruct binding command.

 */

struct vmw_ctx_bindinfo_so {

	struct vmw_ctx_bindinfo bi;

	uint32 slot;

};



extern void vmw_binding_add(struct vmw_ctx_binding_state *cbs,

			    const struct vmw_ctx_bindinfo *ci,

			    u32 shader_slot, u32 slot);

drivers/gpu/drm/vmwgfx/vmwgfx_cotable.c

+1 −1
Original line number Diff line number Diff line
@@ -80,7 +80,7 @@ static const struct vmw_cotable_info co_info[] = { 
	{1, sizeof(SVGACOTableDXDepthStencilEntry), NULL},

	{1, sizeof(SVGACOTableDXRasterizerStateEntry), NULL},

	{1, sizeof(SVGACOTableDXSamplerEntry), NULL},

	{1, sizeof(SVGACOTableDXStreamOutputEntry), NULL},

	{1, sizeof(SVGACOTableDXStreamOutputEntry), &vmw_dx_streamoutput_cotable_list_scrub},

	{1, sizeof(SVGACOTableDXQueryEntry), NULL},

	{1, sizeof(SVGACOTableDXShaderEntry), &vmw_dx_shader_cotable_list_scrub},

	{1, sizeof(SVGACOTableDXUAViewEntry), &vmw_view_cotable_list_destroy}

drivers/gpu/drm/vmwgfx/vmwgfx_drv.h

+21 −1
Original line number Diff line number Diff line
@@ -202,6 +202,7 @@ enum vmw_res_type { 
	vmw_res_dx_context,

	vmw_res_cotable,

	vmw_res_view,

	vmw_res_streamoutput,

	vmw_res_max

};
@@ -210,7 +211,8 @@ enum vmw_res_type { 
 */

enum vmw_cmdbuf_res_type {

	vmw_cmdbuf_res_shader,

	vmw_cmdbuf_res_view

	vmw_cmdbuf_res_view,

	vmw_cmdbuf_res_streamoutput

};



struct vmw_cmdbuf_res_manager;
@@ -1307,6 +1309,24 @@ extern struct vmw_resource * 
vmw_shader_lookup(struct vmw_cmdbuf_res_manager *man,

		  u32 user_key, SVGA3dShaderType shader_type);



/*

 * Streamoutput management

 */

struct vmw_resource *

vmw_dx_streamoutput_lookup(struct vmw_cmdbuf_res_manager *man,

			   u32 user_key);

int vmw_dx_streamoutput_add(struct vmw_cmdbuf_res_manager *man,

			    struct vmw_resource *ctx,

			    SVGA3dStreamOutputId user_key,

			    struct list_head *list);

void vmw_dx_streamoutput_set_size(struct vmw_resource *res, u32 size);

int vmw_dx_streamoutput_remove(struct vmw_cmdbuf_res_manager *man,

			       SVGA3dStreamOutputId user_key,

			       struct list_head *list);

void vmw_dx_streamoutput_cotable_list_scrub(struct vmw_private *dev_priv,

					    struct list_head *list,

					    bool readback);



/*

 * Command buffer managed resources - vmwgfx_cmdbuf_res.c

 */