Commit e88bd316 authored by Zenghui Yu's avatar Zenghui Yu Committed by Marc Zyngier
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irqchip/gic-v4.1: Fix programming of GICR_VPROPBASER_4_1_SIZE



The Size field of GICv4.1 VPROPBASER register indicates number of
pages minus one and together Page_Size and Size control the vPEID
width. Let's respect this requirement of the architecture.

Signed-off-by: default avatarZenghui Yu <yuzenghui@huawei.com>
Signed-off-by: default avatarMarc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20200206075711.1275-2-yuzenghui@huawei.com
parent 10794522
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+1 −1
Original line number Diff line number Diff line
@@ -2531,7 +2531,7 @@ static int allocate_vpe_l1_table(void)
		npg = 1;
	}

	val |= FIELD_PREP(GICR_VPROPBASER_4_1_SIZE, npg);
	val |= FIELD_PREP(GICR_VPROPBASER_4_1_SIZE, npg - 1);

	/* Right, that's the number of CPU pages we need for L1 */
	np = DIV_ROUND_UP(npg * psz, PAGE_SIZE);