Commit e8166841 authored by Richard Weinberger's avatar Richard Weinberger
Browse files

Merge remote-tracking branch 'korg_git/nand/next' into mtd/next

parents ad9b10d1 e16eceea
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+0 −2
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@@ -37,6 +37,4 @@ examples:
        compatible = "fsl,imx27-nand";
        reg = <0xd8000000 0x1000>;
        interrupts = <29>;
        nand-bus-width = <8>;
        nand-ecc-mode = "hw";
    };
+27 −0
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@@ -102,6 +102,31 @@ allOf:
            - const: rx
            - const: cmd

  - if:
      properties:
        compatible:
          contains:
            enum:
              - qcom,ipq806x-nand

    then:
      properties:
        qcom,boot-partitions:
          $ref: /schemas/types.yaml#/definitions/uint32-matrix
          items:
            items:
              - description: offset
              - description: size
          description:
            Boot partition use a different layout where the 4 bytes of spare
            data are not protected by ECC. Use this to declare these special
            partitions by defining first the offset and then the size.

            It's in the form of <offset1 size1 offset2 size2 offset3 ...>
            and should be declared in ascending order.

            Refer to the ipq8064 example on how to use this special binding.

required:
  - compatible
  - reg
@@ -135,6 +160,8 @@ examples:
        nand-ecc-strength = <4>;
        nand-bus-width = <8>;

        qcom,boot-partitions = <0x0 0x58a0000>;

        partitions {
          compatible = "fixed-partitions";
          #address-cells = <1>;
+11 −5
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@@ -347,17 +347,17 @@ static int anfc_select_target(struct nand_chip *chip, int target)

	/* Update clock frequency */
	if (nfc->cur_clk != anand->clk) {
		clk_disable_unprepare(nfc->controller_clk);
		ret = clk_set_rate(nfc->controller_clk, anand->clk);
		clk_disable_unprepare(nfc->bus_clk);
		ret = clk_set_rate(nfc->bus_clk, anand->clk);
		if (ret) {
			dev_err(nfc->dev, "Failed to change clock rate\n");
			return ret;
		}

		ret = clk_prepare_enable(nfc->controller_clk);
		ret = clk_prepare_enable(nfc->bus_clk);
		if (ret) {
			dev_err(nfc->dev,
				"Failed to re-enable the controller clock\n");
				"Failed to re-enable the bus clock\n");
			return ret;
		}

@@ -1043,7 +1043,13 @@ static int anfc_setup_interface(struct nand_chip *chip, int target,
				 DQS_BUFF_SEL_OUT(dqs_mode);
	}

	if (nand_interface_is_sdr(conf)) {
		anand->clk = ANFC_XLNX_SDR_DFLT_CORE_CLK;
	} else {
		/* ONFI timings are defined in picoseconds */
		anand->clk = div_u64((u64)NSEC_PER_SEC * 1000,
				     conf->timings.nvddr.tCK_min);
	}

	/*
	 * Due to a hardware bug in the ZynqMP SoC, SDR timing modes 0-1 work
+7 −2
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@@ -679,8 +679,10 @@ static int cafe_nand_probe(struct pci_dev *pdev,
	pci_set_master(pdev);

	cafe = kzalloc(sizeof(*cafe), GFP_KERNEL);
	if (!cafe)
		return  -ENOMEM;
	if (!cafe) {
		err = -ENOMEM;
		goto out_disable_device;
	}

	mtd = nand_to_mtd(&cafe->nand);
	mtd->dev.parent = &pdev->dev;
@@ -801,6 +803,8 @@ static int cafe_nand_probe(struct pci_dev *pdev,
	pci_iounmap(pdev, cafe->mmio);
 out_free_mtd:
	kfree(cafe);
 out_disable_device:
	pci_disable_device(pdev);
 out:
	return err;
}
@@ -822,6 +826,7 @@ static void cafe_nand_remove(struct pci_dev *pdev)
	pci_iounmap(pdev, cafe->mmio);
	dma_free_coherent(&cafe->pdev->dev, 2112, cafe->dmabuf, cafe->dmaaddr);
	kfree(cafe);
	pci_disable_device(pdev);
}

static const struct pci_device_id cafe_nand_tbl[] = {
+0 −1
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@@ -1304,7 +1304,6 @@ static void meson_nfc_nand_chip_cleanup(struct meson_nfc *nfc)
		mtd = nand_to_mtd(&meson_chip->nand);
		WARN_ON(mtd_device_unregister(mtd));

		meson_nfc_free_buffer(&meson_chip->nand);
		nand_cleanup(&meson_chip->nand);
		list_del(&meson_chip->node);
	}
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