Commit e787c5b7 authored by Lubomir Rintel's avatar Lubomir Rintel Committed by Stephen Boyd
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dt-bindings: clock: Add Marvell MMP Audio Clock Controller binding



This describes the bindings for a controller that generates master and bit
clocks for the I2S interface.

Signed-off-by: default avatarLubomir Rintel <lkundrak@v3.sk>
Link: https://lkml.kernel.org/r/20200519224151.2074597-13-lkundrak@v3.sk


Reviewed-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarStephen Boyd <sboyd@kernel.org>
parent ee4df236
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# SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/marvell,mmp2-audio-clock.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Marvell MMP2 Audio Clock Controller

maintainers:
  - Lubomir Rintel <lkundrak@v3.sk>

description: |
  The audio clock controller generates and supplies the clocks to the audio
  codec.

  Each clock is assigned an identifier and client nodes use this identifier
  to specify the clock which they consume.

  All these identifiers could be found in
  <dt-bindings/clock/marvell,mmp2-audio.h>.

properties:
  compatible:
    enum:
      - marvell,mmp2-audio-clock

  reg:
    maxItems: 1

  clocks:
    items:
      - description: Audio subsystem clock
      - description: The crystal oscillator clock
      - description: First I2S clock
      - description: Second I2S clock

  clock-names:
    items:
      - const: audio
      - const: vctcxo
      - const: i2s0
      - const: i2s1

  '#clock-cells':
    const: 1

  power-domains:
    maxItems: 1

required:
  - compatible
  - reg
  - clocks
  - clock-names
  - '#clock-cells'

additionalProperties: false

examples:
  - |
    #include <dt-bindings/clock/marvell,mmp2-audio.h>
    #include <dt-bindings/power/marvell,mmp2.h>

    clock-controller@d42a0c30 {
      compatible = "marvell,mmp2-audio-clock";
      reg = <0xd42a0c30 0x10>;
      clock-names = "audio", "vctcxo", "i2s0", "i2s1";
      clocks = <&soc_clocks MMP2_CLK_AUDIO>,
               <&soc_clocks MMP2_CLK_VCTCXO>,
               <&soc_clocks MMP2_CLK_I2S0>,
               <&soc_clocks MMP2_CLK_I2S1>;
      power-domains = <&soc_clocks MMP2_POWER_DOMAIN_AUDIO>;
      #clock-cells = <1>;
    };
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/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause) */
#ifndef __DT_BINDINGS_CLOCK_MARVELL_MMP2_AUDIO_H
#define __DT_BINDINGS_CLOCK_MARVELL_MMP2_AUDIO_H

#define MMP2_CLK_AUDIO_SYSCLK		0
#define MMP2_CLK_AUDIO_SSPA0		1
#define MMP2_CLK_AUDIO_SSPA1		2

#define MMP2_CLK_AUDIO_NR_CLKS		3
#endif