Loading arch/mips/alchemy/common/dbdma.c +5 −2 Original line number Diff line number Diff line Loading @@ -412,8 +412,11 @@ u32 au1xxx_dbdma_ring_alloc(u32 chanid, int entries) if (desc_base == 0) return 0; ctp->cdb_membase = desc_base; desc_base = ALIGN_ADDR(desc_base, sizeof(au1x_ddma_desc_t)); } } else ctp->cdb_membase = desc_base; dp = (au1x_ddma_desc_t *)desc_base; /* Keep track of the base descriptor. */ Loading Loading @@ -831,7 +834,7 @@ void au1xxx_dbdma_chan_free(u32 chanid) au1xxx_dbdma_stop(chanid); kfree((void *)ctp->chan_desc_base); kfree((void *)ctp->cdb_membase); stp->dev_flags &= ~DEV_FLAGS_INUSE; dtp->dev_flags &= ~DEV_FLAGS_INUSE; Loading arch/mips/ar7/platform.c +1 −1 Original line number Diff line number Diff line Loading @@ -202,7 +202,7 @@ static struct resource usb_res[] = { .name = "mem", .flags = IORESOURCE_MEM, .start = 0x03400000, .end = 0x034001fff, .end = 0x03401fff, }, }; Loading arch/mips/include/asm/cpu-features.h +7 −0 Original line number Diff line number Diff line Loading @@ -191,6 +191,9 @@ # ifndef cpu_has_64bit_addresses # define cpu_has_64bit_addresses 0 # endif # ifndef cpu_vmbits # define cpu_vmbits 31 # endif #endif #ifdef CONFIG_64BIT Loading @@ -209,6 +212,10 @@ # ifndef cpu_has_64bit_addresses # define cpu_has_64bit_addresses 1 # endif # ifndef cpu_vmbits # define cpu_vmbits cpu_data[0].vmbits # define __NEED_VMBITS_PROBE # endif #endif #if defined(CONFIG_CPU_MIPSR2_IRQ_VI) && !defined(cpu_has_vint) Loading arch/mips/include/asm/cpu-info.h +3 −0 Original line number Diff line number Diff line Loading @@ -58,6 +58,9 @@ struct cpuinfo_mips { struct cache_desc tcache; /* Tertiary/split secondary cache */ int srsets; /* Shadow register sets */ int core; /* physical core number */ #ifdef CONFIG_64BIT int vmbits; /* Virtual memory size in bits */ #endif #if defined(CONFIG_MIPS_MT_SMP) || defined(CONFIG_MIPS_MT_SMTC) /* * In the MIPS MT "SMTC" model, each TC is considered Loading arch/mips/include/asm/mach-au1x00/au1xxx_dbdma.h +1 −0 Original line number Diff line number Diff line Loading @@ -305,6 +305,7 @@ typedef struct dbdma_chan_config { dbdev_tab_t *chan_dest; au1x_dma_chan_t *chan_ptr; au1x_ddma_desc_t *chan_desc_base; u32 cdb_membase; /* kmalloc base of above */ au1x_ddma_desc_t *get_ptr, *put_ptr, *cur_ptr; void *chan_callparam; void (*chan_callback)(int, void *); Loading Loading
arch/mips/alchemy/common/dbdma.c +5 −2 Original line number Diff line number Diff line Loading @@ -412,8 +412,11 @@ u32 au1xxx_dbdma_ring_alloc(u32 chanid, int entries) if (desc_base == 0) return 0; ctp->cdb_membase = desc_base; desc_base = ALIGN_ADDR(desc_base, sizeof(au1x_ddma_desc_t)); } } else ctp->cdb_membase = desc_base; dp = (au1x_ddma_desc_t *)desc_base; /* Keep track of the base descriptor. */ Loading Loading @@ -831,7 +834,7 @@ void au1xxx_dbdma_chan_free(u32 chanid) au1xxx_dbdma_stop(chanid); kfree((void *)ctp->chan_desc_base); kfree((void *)ctp->cdb_membase); stp->dev_flags &= ~DEV_FLAGS_INUSE; dtp->dev_flags &= ~DEV_FLAGS_INUSE; Loading
arch/mips/ar7/platform.c +1 −1 Original line number Diff line number Diff line Loading @@ -202,7 +202,7 @@ static struct resource usb_res[] = { .name = "mem", .flags = IORESOURCE_MEM, .start = 0x03400000, .end = 0x034001fff, .end = 0x03401fff, }, }; Loading
arch/mips/include/asm/cpu-features.h +7 −0 Original line number Diff line number Diff line Loading @@ -191,6 +191,9 @@ # ifndef cpu_has_64bit_addresses # define cpu_has_64bit_addresses 0 # endif # ifndef cpu_vmbits # define cpu_vmbits 31 # endif #endif #ifdef CONFIG_64BIT Loading @@ -209,6 +212,10 @@ # ifndef cpu_has_64bit_addresses # define cpu_has_64bit_addresses 1 # endif # ifndef cpu_vmbits # define cpu_vmbits cpu_data[0].vmbits # define __NEED_VMBITS_PROBE # endif #endif #if defined(CONFIG_CPU_MIPSR2_IRQ_VI) && !defined(cpu_has_vint) Loading
arch/mips/include/asm/cpu-info.h +3 −0 Original line number Diff line number Diff line Loading @@ -58,6 +58,9 @@ struct cpuinfo_mips { struct cache_desc tcache; /* Tertiary/split secondary cache */ int srsets; /* Shadow register sets */ int core; /* physical core number */ #ifdef CONFIG_64BIT int vmbits; /* Virtual memory size in bits */ #endif #if defined(CONFIG_MIPS_MT_SMP) || defined(CONFIG_MIPS_MT_SMTC) /* * In the MIPS MT "SMTC" model, each TC is considered Loading
arch/mips/include/asm/mach-au1x00/au1xxx_dbdma.h +1 −0 Original line number Diff line number Diff line Loading @@ -305,6 +305,7 @@ typedef struct dbdma_chan_config { dbdev_tab_t *chan_dest; au1x_dma_chan_t *chan_ptr; au1x_ddma_desc_t *chan_desc_base; u32 cdb_membase; /* kmalloc base of above */ au1x_ddma_desc_t *get_ptr, *put_ptr, *cur_ptr; void *chan_callparam; void (*chan_callback)(int, void *); Loading