Loading arch/arm/boot/dts/imx6q.dtsi +1 −1 Original line number Diff line number Diff line Loading @@ -125,7 +125,7 @@ clocks = <&clks IMX6QDL_CLK_OPENVG_AXI>, <&clks IMX6QDL_CLK_GPU2D_CORE>; clock-names = "bus", "core"; power-domains = <&gpc 1>; power-domains = <&pd_pu>; }; ipu2: ipu@02800000 { Loading arch/arm/boot/dts/imx6qdl.dtsi +26 −11 Original line number Diff line number Diff line Loading @@ -156,7 +156,7 @@ <&clks IMX6QDL_CLK_GPU3D_CORE>, <&clks IMX6QDL_CLK_GPU3D_SHADER>; clock-names = "bus", "core", "shader"; power-domains = <&gpc 1>; power-domains = <&pd_pu>; }; gpu_2d: gpu@00134000 { Loading @@ -166,7 +166,7 @@ clocks = <&clks IMX6QDL_CLK_GPU2D_AXI>, <&clks IMX6QDL_CLK_GPU2D_CORE>; clock-names = "bus", "core"; power-domains = <&gpc 1>; power-domains = <&pd_pu>; }; timer@00a00600 { Loading Loading @@ -434,7 +434,7 @@ clocks = <&clks IMX6QDL_CLK_VPU_AXI>, <&clks IMX6QDL_CLK_MMDC_CH0_AXI>; clock-names = "per", "ahb"; power-domains = <&gpc 1>; power-domains = <&pd_pu>; resets = <&src 1>; iram = <&ocram>; }; Loading Loading @@ -797,14 +797,29 @@ interrupts = <0 89 IRQ_TYPE_LEVEL_HIGH>, <0 90 IRQ_TYPE_LEVEL_HIGH>; interrupt-parent = <&intc>; pu-supply = <®_pu>; clocks = <&clks IMX6QDL_CLK_IPG>; clock-names = "ipg"; pgc { #address-cells = <1>; #size-cells = <0>; power-domain@0 { reg = <0>; #power-domain-cells = <0>; }; pd_pu: power-domain@1 { reg = <1>; #power-domain-cells = <0>; power-supply = <®_pu>; clocks = <&clks IMX6QDL_CLK_GPU3D_CORE>, <&clks IMX6QDL_CLK_GPU3D_SHADER>, <&clks IMX6QDL_CLK_GPU2D_CORE>, <&clks IMX6QDL_CLK_GPU2D_AXI>, <&clks IMX6QDL_CLK_OPENVG_AXI>, <&clks IMX6QDL_CLK_VPU_AXI>; #power-domain-cells = <1>; }; }; }; gpr: iomuxc-gpr@020e0000 { Loading Loading
arch/arm/boot/dts/imx6q.dtsi +1 −1 Original line number Diff line number Diff line Loading @@ -125,7 +125,7 @@ clocks = <&clks IMX6QDL_CLK_OPENVG_AXI>, <&clks IMX6QDL_CLK_GPU2D_CORE>; clock-names = "bus", "core"; power-domains = <&gpc 1>; power-domains = <&pd_pu>; }; ipu2: ipu@02800000 { Loading
arch/arm/boot/dts/imx6qdl.dtsi +26 −11 Original line number Diff line number Diff line Loading @@ -156,7 +156,7 @@ <&clks IMX6QDL_CLK_GPU3D_CORE>, <&clks IMX6QDL_CLK_GPU3D_SHADER>; clock-names = "bus", "core", "shader"; power-domains = <&gpc 1>; power-domains = <&pd_pu>; }; gpu_2d: gpu@00134000 { Loading @@ -166,7 +166,7 @@ clocks = <&clks IMX6QDL_CLK_GPU2D_AXI>, <&clks IMX6QDL_CLK_GPU2D_CORE>; clock-names = "bus", "core"; power-domains = <&gpc 1>; power-domains = <&pd_pu>; }; timer@00a00600 { Loading Loading @@ -434,7 +434,7 @@ clocks = <&clks IMX6QDL_CLK_VPU_AXI>, <&clks IMX6QDL_CLK_MMDC_CH0_AXI>; clock-names = "per", "ahb"; power-domains = <&gpc 1>; power-domains = <&pd_pu>; resets = <&src 1>; iram = <&ocram>; }; Loading Loading @@ -797,14 +797,29 @@ interrupts = <0 89 IRQ_TYPE_LEVEL_HIGH>, <0 90 IRQ_TYPE_LEVEL_HIGH>; interrupt-parent = <&intc>; pu-supply = <®_pu>; clocks = <&clks IMX6QDL_CLK_IPG>; clock-names = "ipg"; pgc { #address-cells = <1>; #size-cells = <0>; power-domain@0 { reg = <0>; #power-domain-cells = <0>; }; pd_pu: power-domain@1 { reg = <1>; #power-domain-cells = <0>; power-supply = <®_pu>; clocks = <&clks IMX6QDL_CLK_GPU3D_CORE>, <&clks IMX6QDL_CLK_GPU3D_SHADER>, <&clks IMX6QDL_CLK_GPU2D_CORE>, <&clks IMX6QDL_CLK_GPU2D_AXI>, <&clks IMX6QDL_CLK_OPENVG_AXI>, <&clks IMX6QDL_CLK_VPU_AXI>; #power-domain-cells = <1>; }; }; }; gpr: iomuxc-gpr@020e0000 { Loading