Commit e7495a45 authored by Stefan Agner's avatar Stefan Agner Committed by Shawn Guo
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ARM: dts: imx7: add GPMI NAND and APBH DMA 



Add i.MX 7 APBH DMA and GPMI NAND modules.

Signed-off-by: default avatarStefan Agner <stefan@agner.ch>
Tested-by: default avatarFabio Estevam <fabio.estevam@nxp.com>
Acked-by: default avatarHan Xu <han.xu@nxp.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 4c1bad09

arch/arm/boot/dts/imx7s.dtsi

+31 −0
Original line number Diff line number Diff line
@@ -1022,5 +1022,36 @@ 
				status = "disabled";

			};

		};



		dma_apbh: dma-apbh@33000000 {

			compatible = "fsl,imx7d-dma-apbh", "fsl,imx28-dma-apbh";

			reg = <0x33000000 0x2000>;

			interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;

			interrupt-names = "gpmi0", "gpmi1", "gpmi2", "gpmi3";

			#dma-cells = <1>;

			dma-channels = <4>;

			clocks = <&clks IMX7D_NAND_USDHC_BUS_RAWNAND_CLK>;

		};



		gpmi: gpmi-nand@33002000{

			compatible = "fsl,imx7d-gpmi-nand";

			#address-cells = <1>;

			#size-cells = <1>;

			reg = <0x33002000 0x2000>, <0x33004000 0x4000>;

			reg-names = "gpmi-nand", "bch";

			interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;

			interrupt-names = "bch";

			clocks = <&clks IMX7D_NAND_RAWNAND_CLK>,

				<&clks IMX7D_NAND_USDHC_BUS_RAWNAND_CLK>;

			clock-names = "gpmi_io", "gpmi_bch_apb";

			dmas = <&dma_apbh 0>;

			dma-names = "rx-tx";

			status = "disabled";

			assigned-clocks = <&clks IMX7D_NAND_ROOT_SRC>;

			assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_500M_CLK>;

		};

	};

};