Commit e73d371a authored by Ben Skeggs's avatar Ben Skeggs
Browse files

drm/nouveau/pm: switch to instanced constructor 



Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
Reviewed-by: default avatarLyude Paul <lyude@redhat.com>
parent ee532a8d

drivers/gpu/drm/nouveau/include/nvkm/core/device.h

+0 −2
Original line number Diff line number Diff line
@@ -60,7 +60,6 @@ struct nvkm_device { 
		struct notifier_block nb;

	} acpi;



	struct nvkm_pm *pm;

	struct nvkm_engine *sec;

	struct nvkm_sec2 *sec2;

	struct nvkm_sw *sw;
@@ -106,7 +105,6 @@ struct nvkm_device_chip { 
#undef NVKM_LAYOUT_INST

#undef NVKM_LAYOUT_ONCE



	int (*pm      )(struct nvkm_device *, int idx, struct nvkm_pm **);

	int (*sec     )(struct nvkm_device *, int idx, struct nvkm_engine **);

	int (*sec2    )(struct nvkm_device *, int idx, struct nvkm_sec2 **);

	int (*sw      )(struct nvkm_device *, int idx, struct nvkm_sw **);

drivers/gpu/drm/nouveau/include/nvkm/core/layout.h

+1 −0
Original line number Diff line number Diff line
@@ -41,4 +41,5 @@ NVKM_LAYOUT_ONCE(NVKM_ENGINE_MSPPP , struct nvkm_engine , msppp) 
NVKM_LAYOUT_ONCE(NVKM_ENGINE_MSVLD   , struct nvkm_engine  ,    msvld)

NVKM_LAYOUT_INST(NVKM_ENGINE_NVDEC   , struct nvkm_nvdec   ,    nvdec, 3)

NVKM_LAYOUT_INST(NVKM_ENGINE_NVENC   , struct nvkm_nvenc   ,    nvenc, 3)

NVKM_LAYOUT_ONCE(NVKM_ENGINE_PM      , struct nvkm_pm      ,       pm)

NVKM_LAYOUT_ONCE(NVKM_ENGINE_VP      , struct nvkm_engine  ,       vp)

drivers/gpu/drm/nouveau/include/nvkm/engine/pm.h

+9 −9
Original line number Diff line number Diff line
@@ -17,13 +17,13 @@ struct nvkm_pm { 
	u32 sequence;

};



int nv40_pm_new(struct nvkm_device *, int, struct nvkm_pm **);

int nv50_pm_new(struct nvkm_device *, int, struct nvkm_pm **);

int g84_pm_new(struct nvkm_device *, int, struct nvkm_pm **);

int gt200_pm_new(struct nvkm_device *, int, struct nvkm_pm **);

int gt215_pm_new(struct nvkm_device *, int, struct nvkm_pm **);

int gf100_pm_new(struct nvkm_device *, int, struct nvkm_pm **);

int gf108_pm_new(struct nvkm_device *, int, struct nvkm_pm **);

int gf117_pm_new(struct nvkm_device *, int, struct nvkm_pm **);

int gk104_pm_new(struct nvkm_device *, int, struct nvkm_pm **);

int nv40_pm_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_pm **);

int nv50_pm_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_pm **);

int g84_pm_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_pm **);

int gt200_pm_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_pm **);

int gt215_pm_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_pm **);

int gf100_pm_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_pm **);

int gf108_pm_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_pm **);

int gf117_pm_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_pm **);

int gk104_pm_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_pm **);

#endif

drivers/gpu/drm/nouveau/nvkm/core/subdev.c

+0 −1
Original line number Diff line number Diff line
@@ -33,7 +33,6 @@ nvkm_subdev_type[NVKM_SUBDEV_NR] = { 
#include <core/layout.h>

#undef NVKM_LAYOUT_ONCE

#undef NVKM_LAYOUT_INST

	[NVKM_ENGINE_PM      ] = "pm",

	[NVKM_ENGINE_SEC     ] = "sec",

	[NVKM_ENGINE_SEC2    ] = "sec2",

	[NVKM_ENGINE_SW      ] = "sw",

drivers/gpu/drm/nouveau/nvkm/engine/device/base.c

+43 −44
Original line number Diff line number Diff line
@@ -491,7 +491,7 @@ nv40_chipset = { 
	.fifo     = { 0x00000001, nv40_fifo_new },

	.gr       = { 0x00000001, nv40_gr_new },

	.mpeg     = { 0x00000001, nv40_mpeg_new },

	.pm = nv40_pm_new,

	.pm       = { 0x00000001, nv40_pm_new },

	.sw = nv10_sw_new,

};
@@ -517,7 +517,7 @@ nv41_chipset = { 
	.fifo     = { 0x00000001, nv40_fifo_new },

	.gr       = { 0x00000001, nv40_gr_new },

	.mpeg     = { 0x00000001, nv40_mpeg_new },

	.pm = nv40_pm_new,

	.pm       = { 0x00000001, nv40_pm_new },

	.sw = nv10_sw_new,

};
@@ -543,7 +543,7 @@ nv42_chipset = { 
	.fifo     = { 0x00000001, nv40_fifo_new },

	.gr       = { 0x00000001, nv40_gr_new },

	.mpeg     = { 0x00000001, nv40_mpeg_new },

	.pm = nv40_pm_new,

	.pm       = { 0x00000001, nv40_pm_new },

	.sw = nv10_sw_new,

};
@@ -569,7 +569,7 @@ nv43_chipset = { 
	.fifo     = { 0x00000001, nv40_fifo_new },

	.gr       = { 0x00000001, nv40_gr_new },

	.mpeg     = { 0x00000001, nv40_mpeg_new },

	.pm = nv40_pm_new,

	.pm       = { 0x00000001, nv40_pm_new },

	.sw = nv10_sw_new,

};
@@ -595,7 +595,7 @@ nv44_chipset = { 
	.fifo     = { 0x00000001, nv40_fifo_new },

	.gr       = { 0x00000001, nv44_gr_new },

	.mpeg     = { 0x00000001, nv44_mpeg_new },

	.pm = nv40_pm_new,

	.pm       = { 0x00000001, nv40_pm_new },

	.sw = nv10_sw_new,

};
@@ -621,7 +621,7 @@ nv45_chipset = { 
	.fifo     = { 0x00000001, nv40_fifo_new },

	.gr       = { 0x00000001, nv40_gr_new },

	.mpeg     = { 0x00000001, nv44_mpeg_new },

	.pm = nv40_pm_new,

	.pm       = { 0x00000001, nv40_pm_new },

	.sw = nv10_sw_new,

};
@@ -647,7 +647,7 @@ nv46_chipset = { 
	.fifo     = { 0x00000001, nv40_fifo_new },

	.gr       = { 0x00000001, nv44_gr_new },

	.mpeg     = { 0x00000001, nv44_mpeg_new },

	.pm = nv40_pm_new,

	.pm       = { 0x00000001, nv40_pm_new },

	.sw = nv10_sw_new,

};
@@ -673,7 +673,7 @@ nv47_chipset = { 
	.fifo     = { 0x00000001, nv40_fifo_new },

	.gr       = { 0x00000001, nv40_gr_new },

	.mpeg     = { 0x00000001, nv44_mpeg_new },

	.pm = nv40_pm_new,

	.pm       = { 0x00000001, nv40_pm_new },

	.sw = nv10_sw_new,

};
@@ -699,7 +699,7 @@ nv49_chipset = { 
	.fifo     = { 0x00000001, nv40_fifo_new },

	.gr       = { 0x00000001, nv40_gr_new },

	.mpeg     = { 0x00000001, nv44_mpeg_new },

	.pm = nv40_pm_new,

	.pm       = { 0x00000001, nv40_pm_new },

	.sw = nv10_sw_new,

};
@@ -725,7 +725,7 @@ nv4a_chipset = { 
	.fifo     = { 0x00000001, nv40_fifo_new },

	.gr       = { 0x00000001, nv44_gr_new },

	.mpeg     = { 0x00000001, nv44_mpeg_new },

	.pm = nv40_pm_new,

	.pm       = { 0x00000001, nv40_pm_new },

	.sw = nv10_sw_new,

};
@@ -751,7 +751,7 @@ nv4b_chipset = { 
	.fifo     = { 0x00000001, nv40_fifo_new },

	.gr       = { 0x00000001, nv40_gr_new },

	.mpeg     = { 0x00000001, nv44_mpeg_new },

	.pm = nv40_pm_new,

	.pm       = { 0x00000001, nv40_pm_new },

	.sw = nv10_sw_new,

};
@@ -777,7 +777,7 @@ nv4c_chipset = { 
	.fifo     = { 0x00000001, nv40_fifo_new },

	.gr       = { 0x00000001, nv44_gr_new },

	.mpeg     = { 0x00000001, nv44_mpeg_new },

	.pm = nv40_pm_new,

	.pm       = { 0x00000001, nv40_pm_new },

	.sw = nv10_sw_new,

};
@@ -803,7 +803,7 @@ nv4e_chipset = { 
	.fifo     = { 0x00000001, nv40_fifo_new },

	.gr       = { 0x00000001, nv44_gr_new },

	.mpeg     = { 0x00000001, nv44_mpeg_new },

	.pm = nv40_pm_new,

	.pm       = { 0x00000001, nv40_pm_new },

	.sw = nv10_sw_new,

};
@@ -832,7 +832,7 @@ nv50_chipset = { 
	.fifo     = { 0x00000001, nv50_fifo_new },

	.gr       = { 0x00000001, nv50_gr_new },

	.mpeg     = { 0x00000001, nv50_mpeg_new },

	.pm = nv50_pm_new,

	.pm       = { 0x00000001, nv50_pm_new },

	.sw = nv50_sw_new,

};
@@ -858,7 +858,7 @@ nv63_chipset = { 
	.fifo     = { 0x00000001, nv40_fifo_new },

	.gr       = { 0x00000001, nv44_gr_new },

	.mpeg     = { 0x00000001, nv44_mpeg_new },

	.pm = nv40_pm_new,

	.pm       = { 0x00000001, nv40_pm_new },

	.sw = nv10_sw_new,

};
@@ -884,7 +884,7 @@ nv67_chipset = { 
	.fifo     = { 0x00000001, nv40_fifo_new },

	.gr       = { 0x00000001, nv44_gr_new },

	.mpeg     = { 0x00000001, nv44_mpeg_new },

	.pm = nv40_pm_new,

	.pm       = { 0x00000001, nv40_pm_new },

	.sw = nv10_sw_new,

};
@@ -910,7 +910,7 @@ nv68_chipset = { 
	.fifo     = { 0x00000001, nv40_fifo_new },

	.gr       = { 0x00000001, nv44_gr_new },

	.mpeg     = { 0x00000001, nv44_mpeg_new },

	.pm = nv40_pm_new,

	.pm       = { 0x00000001, nv40_pm_new },

	.sw = nv10_sw_new,

};
@@ -941,7 +941,7 @@ nv84_chipset = { 
	.fifo     = { 0x00000001, g84_fifo_new },

	.gr       = { 0x00000001, g84_gr_new },

	.mpeg     = { 0x00000001, g84_mpeg_new },

	.pm = g84_pm_new,

	.pm       = { 0x00000001, g84_pm_new },

	.sw = nv50_sw_new,

	.vp       = { 0x00000001, g84_vp_new },

};
@@ -973,7 +973,7 @@ nv86_chipset = { 
	.fifo     = { 0x00000001, g84_fifo_new },

	.gr       = { 0x00000001, g84_gr_new },

	.mpeg     = { 0x00000001, g84_mpeg_new },

	.pm = g84_pm_new,

	.pm       = { 0x00000001, g84_pm_new },

	.sw = nv50_sw_new,

	.vp       = { 0x00000001, g84_vp_new },

};
@@ -1005,7 +1005,7 @@ nv92_chipset = { 
	.fifo     = { 0x00000001, g84_fifo_new },

	.gr       = { 0x00000001, g84_gr_new },

	.mpeg     = { 0x00000001, g84_mpeg_new },

	.pm = g84_pm_new,

	.pm       = { 0x00000001, g84_pm_new },

	.sw = nv50_sw_new,

	.vp       = { 0x00000001, g84_vp_new },

};
@@ -1037,7 +1037,7 @@ nv94_chipset = { 
	.fifo     = { 0x00000001, g84_fifo_new },

	.gr       = { 0x00000001, g84_gr_new },

	.mpeg     = { 0x00000001, g84_mpeg_new },

	.pm = g84_pm_new,

	.pm       = { 0x00000001, g84_pm_new },

	.sw = nv50_sw_new,

	.vp       = { 0x00000001, g84_vp_new },

};
@@ -1069,7 +1069,7 @@ nv96_chipset = { 
	.fifo     = { 0x00000001, g84_fifo_new },

	.gr       = { 0x00000001, g84_gr_new },

	.mpeg     = { 0x00000001, g84_mpeg_new },

	.pm = g84_pm_new,

	.pm       = { 0x00000001, g84_pm_new },

	.sw = nv50_sw_new,

	.vp       = { 0x00000001, g84_vp_new },

};
@@ -1101,7 +1101,7 @@ nv98_chipset = { 
	.mspdec   = { 0x00000001, g98_mspdec_new },

	.msppp    = { 0x00000001, g98_msppp_new },

	.msvld    = { 0x00000001, g98_msvld_new },

	.pm = g84_pm_new,

	.pm       = { 0x00000001, g84_pm_new },

	.sec = g98_sec_new,

	.sw = nv50_sw_new,

};
@@ -1133,7 +1133,7 @@ nva0_chipset = { 
	.fifo     = { 0x00000001, g84_fifo_new },

	.gr       = { 0x00000001, gt200_gr_new },

	.mpeg     = { 0x00000001, g84_mpeg_new },

	.pm = gt200_pm_new,

	.pm       = { 0x00000001, gt200_pm_new },

	.sw = nv50_sw_new,

	.vp       = { 0x00000001, g84_vp_new },

};
@@ -1168,7 +1168,7 @@ nva3_chipset = { 
	.mspdec   = { 0x00000001, gt215_mspdec_new },

	.msppp    = { 0x00000001, gt215_msppp_new },

	.msvld    = { 0x00000001, gt215_msvld_new },

	.pm = gt215_pm_new,

	.pm       = { 0x00000001, gt215_pm_new },

	.sw = nv50_sw_new,

};
@@ -1201,7 +1201,7 @@ nva5_chipset = { 
	.mspdec   = { 0x00000001, gt215_mspdec_new },

	.msppp    = { 0x00000001, gt215_msppp_new },

	.msvld    = { 0x00000001, gt215_msvld_new },

	.pm = gt215_pm_new,

	.pm       = { 0x00000001, gt215_pm_new },

	.sw = nv50_sw_new,

};
@@ -1234,7 +1234,7 @@ nva8_chipset = { 
	.mspdec   = { 0x00000001, gt215_mspdec_new },

	.msppp    = { 0x00000001, gt215_msppp_new },

	.msvld    = { 0x00000001, gt215_msvld_new },

	.pm = gt215_pm_new,

	.pm       = { 0x00000001, gt215_pm_new },

	.sw = nv50_sw_new,

};
@@ -1265,7 +1265,7 @@ nvaa_chipset = { 
	.mspdec   = { 0x00000001, g98_mspdec_new },

	.msppp    = { 0x00000001, g98_msppp_new },

	.msvld    = { 0x00000001, g98_msvld_new },

	.pm = g84_pm_new,

	.pm       = { 0x00000001, g84_pm_new },

	.sec = g98_sec_new,

	.sw = nv50_sw_new,

};
@@ -1297,7 +1297,7 @@ nvac_chipset = { 
	.mspdec   = { 0x00000001, g98_mspdec_new },

	.msppp    = { 0x00000001, g98_msppp_new },

	.msvld    = { 0x00000001, g98_msvld_new },

	.pm = g84_pm_new,

	.pm       = { 0x00000001, g84_pm_new },

	.sec = g98_sec_new,

	.sw = nv50_sw_new,

};
@@ -1331,7 +1331,7 @@ nvaf_chipset = { 
	.mspdec   = { 0x00000001, gt215_mspdec_new },

	.msppp    = { 0x00000001, gt215_msppp_new },

	.msvld    = { 0x00000001, mcp89_msvld_new },

	.pm = gt215_pm_new,

	.pm       = { 0x00000001, gt215_pm_new },

	.sw = nv50_sw_new,

};
@@ -1367,7 +1367,7 @@ nvc0_chipset = { 
	.mspdec   = { 0x00000001, gf100_mspdec_new },

	.msppp    = { 0x00000001, gf100_msppp_new },

	.msvld    = { 0x00000001, gf100_msvld_new },

	.pm = gf100_pm_new,

	.pm       = { 0x00000001, gf100_pm_new },

	.sw = gf100_sw_new,

};
@@ -1403,7 +1403,7 @@ nvc1_chipset = { 
	.mspdec   = { 0x00000001, gf100_mspdec_new },

	.msppp    = { 0x00000001, gf100_msppp_new },

	.msvld    = { 0x00000001, gf100_msvld_new },

	.pm = gf108_pm_new,

	.pm       = { 0x00000001, gf108_pm_new },

	.sw = gf100_sw_new,

};
@@ -1439,7 +1439,7 @@ nvc3_chipset = { 
	.mspdec   = { 0x00000001, gf100_mspdec_new },

	.msppp    = { 0x00000001, gf100_msppp_new },

	.msvld    = { 0x00000001, gf100_msvld_new },

	.pm = gf100_pm_new,

	.pm       = { 0x00000001, gf100_pm_new },

	.sw = gf100_sw_new,

};
@@ -1475,7 +1475,7 @@ nvc4_chipset = { 
	.mspdec   = { 0x00000001, gf100_mspdec_new },

	.msppp    = { 0x00000001, gf100_msppp_new },

	.msvld    = { 0x00000001, gf100_msvld_new },

	.pm = gf100_pm_new,

	.pm       = { 0x00000001, gf100_pm_new },

	.sw = gf100_sw_new,

};
@@ -1511,7 +1511,7 @@ nvc8_chipset = { 
	.mspdec   = { 0x00000001, gf100_mspdec_new },

	.msppp    = { 0x00000001, gf100_msppp_new },

	.msvld    = { 0x00000001, gf100_msvld_new },

	.pm = gf100_pm_new,

	.pm       = { 0x00000001, gf100_pm_new },

	.sw = gf100_sw_new,

};
@@ -1547,7 +1547,7 @@ nvce_chipset = { 
	.mspdec   = { 0x00000001, gf100_mspdec_new },

	.msppp    = { 0x00000001, gf100_msppp_new },

	.msvld    = { 0x00000001, gf100_msvld_new },

	.pm = gf100_pm_new,

	.pm       = { 0x00000001, gf100_pm_new },

	.sw = gf100_sw_new,

};
@@ -1583,7 +1583,7 @@ nvcf_chipset = { 
	.mspdec   = { 0x00000001, gf100_mspdec_new },

	.msppp    = { 0x00000001, gf100_msppp_new },

	.msvld    = { 0x00000001, gf100_msvld_new },

	.pm = gf100_pm_new,

	.pm       = { 0x00000001, gf100_pm_new },

	.sw = gf100_sw_new,

};
@@ -1618,7 +1618,7 @@ nvd7_chipset = { 
	.mspdec   = { 0x00000001, gf100_mspdec_new },

	.msppp    = { 0x00000001, gf100_msppp_new },

	.msvld    = { 0x00000001, gf100_msvld_new },

	.pm = gf117_pm_new,

	.pm       = { 0x00000001, gf117_pm_new },

	.sw = gf100_sw_new,

};
@@ -1654,7 +1654,7 @@ nvd9_chipset = { 
	.mspdec   = { 0x00000001, gf100_mspdec_new },

	.msppp    = { 0x00000001, gf100_msppp_new },

	.msvld    = { 0x00000001, gf100_msvld_new },

	.pm = gf117_pm_new,

	.pm       = { 0x00000001, gf117_pm_new },

	.sw = gf100_sw_new,

};
@@ -1691,7 +1691,7 @@ nve4_chipset = { 
	.mspdec   = { 0x00000001, gk104_mspdec_new },

	.msppp    = { 0x00000001, gf100_msppp_new },

	.msvld    = { 0x00000001, gk104_msvld_new },

	.pm = gk104_pm_new,

	.pm       = { 0x00000001, gk104_pm_new },

	.sw = gf100_sw_new,

};
@@ -1728,7 +1728,7 @@ nve6_chipset = { 
	.mspdec   = { 0x00000001, gk104_mspdec_new },

	.msppp    = { 0x00000001, gf100_msppp_new },

	.msvld    = { 0x00000001, gk104_msvld_new },

	.pm = gk104_pm_new,

	.pm       = { 0x00000001, gk104_pm_new },

	.sw = gf100_sw_new,

};
@@ -1765,7 +1765,7 @@ nve7_chipset = { 
	.mspdec   = { 0x00000001, gk104_mspdec_new },

	.msppp    = { 0x00000001, gf100_msppp_new },

	.msvld    = { 0x00000001, gk104_msvld_new },

	.pm = gk104_pm_new,

	.pm       = { 0x00000001, gk104_pm_new },

	.sw = gf100_sw_new,

};
@@ -1790,7 +1790,7 @@ nvea_chipset = { 
	.dma      = { 0x00000001, gf119_dma_new },

	.fifo     = { 0x00000001, gk20a_fifo_new },

	.gr       = { 0x00000001, gk20a_gr_new },

	.pm = gk104_pm_new,

	.pm       = { 0x00000001, gk104_pm_new },

	.sw = gf100_sw_new,

};
@@ -3162,7 +3162,6 @@ nvkm_device_ctor(const struct nvkm_device_func *func, 
#include <core/layout.h>

#undef NVKM_LAYOUT_INST

#undef NVKM_LAYOUT_ONCE

		_(NVKM_ENGINE_PM      ,       pm);

		_(NVKM_ENGINE_SEC     ,      sec);

		_(NVKM_ENGINE_SEC2    ,     sec2);

		_(NVKM_ENGINE_SW      ,       sw);