Commit e6f2ffea authored by Fabien Poussin's avatar Fabien Poussin Committed by Jernej Skrabec
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clk: sunxi-ng: d1: Add CAN bus gates and resets 



The D1 CCU contains gates and resets for two CAN buses. While the CAN
bus controllers are only documented for the T113 SoC, the CCU is the
same across all SoC variants.

Signed-off-by: default avatarFabien Poussin <fabien.poussin@gmail.com>
Reviewed-by: default avatarAndre Przywara <andre.przywara@arm.com>
Signed-off-by: default avatarSamuel Holland <samuel@sholland.org>
Acked-by: default avatarJernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20221231231429.18357-7-samuel@sholland.org


Signed-off-by: default avatarJernej Skrabec <jernej.skrabec@gmail.com>
parent 925b61ba

drivers/clk/sunxi-ng/ccu-sun20i-d1.c

+11 −0
Original line number Diff line number Diff line
@@ -469,6 +469,11 @@ static SUNXI_CCU_GATE_HWS(bus_i2c2_clk, "bus-i2c2", apb1_hws, 
static SUNXI_CCU_GATE_HWS(bus_i2c3_clk, "bus-i2c3", apb1_hws,

			  0x91c, BIT(3), 0);



static SUNXI_CCU_GATE_HWS(bus_can0_clk, "bus-can0", apb1_hws,

			  0x92c, BIT(0), 0);

static SUNXI_CCU_GATE_HWS(bus_can1_clk, "bus-can1", apb1_hws,

			  0x92c, BIT(1), 0);



static const struct clk_parent_data spi_parents[] = {

	{ .fw_name = "hosc" },

	{ .hw = &pll_periph0_clk.hw },
@@ -997,6 +1002,8 @@ static struct ccu_common *sun20i_d1_ccu_clks[] = { 
	&bus_i2c1_clk.common,

	&bus_i2c2_clk.common,

	&bus_i2c3_clk.common,

	&bus_can0_clk.common,

	&bus_can1_clk.common,

	&spi0_clk.common,

	&spi1_clk.common,

	&bus_spi0_clk.common,
@@ -1147,6 +1154,8 @@ static struct clk_hw_onecell_data sun20i_d1_hw_clks = { 
		[CLK_BUS_I2C1]		= &bus_i2c1_clk.common.hw,

		[CLK_BUS_I2C2]		= &bus_i2c2_clk.common.hw,

		[CLK_BUS_I2C3]		= &bus_i2c3_clk.common.hw,

		[CLK_BUS_CAN0]		= &bus_can0_clk.common.hw,

		[CLK_BUS_CAN1]		= &bus_can1_clk.common.hw,

		[CLK_SPI0]		= &spi0_clk.common.hw,

		[CLK_SPI1]		= &spi1_clk.common.hw,

		[CLK_BUS_SPI0]		= &bus_spi0_clk.common.hw,
@@ -1252,6 +1261,8 @@ static struct ccu_reset_map sun20i_d1_ccu_resets[] = { 
	[RST_BUS_I2C1]		= { 0x91c, BIT(17) },

	[RST_BUS_I2C2]		= { 0x91c, BIT(18) },

	[RST_BUS_I2C3]		= { 0x91c, BIT(19) },

	[RST_BUS_CAN0]		= { 0x92c, BIT(16) },

	[RST_BUS_CAN1]		= { 0x92c, BIT(17) },

	[RST_BUS_SPI0]		= { 0x96c, BIT(16) },

	[RST_BUS_SPI1]		= { 0x96c, BIT(17) },

	[RST_BUS_EMAC]		= { 0x97c, BIT(16) },

drivers/clk/sunxi-ng/ccu-sun20i-d1.h

+1 −1
Original line number Diff line number Diff line
@@ -10,6 +10,6 @@ 
#include <dt-bindings/clock/sun20i-d1-ccu.h>

#include <dt-bindings/reset/sun20i-d1-ccu.h>



#define CLK_NUMBER		(CLK_FANOUT2 + 1)

#define CLK_NUMBER		(CLK_BUS_CAN1 + 1)



#endif /* _CCU_SUN20I_D1_H_ */