Commit e6d275de authored by Christoph Hellwig's avatar Christoph Hellwig
Browse files

nvme: use nvme_wait_ready in nvme_shutdown_ctrl 



Refactor the code to wait for CSTS state changes so that it can be reused
by nvme_shutdown_ctrl.  This reduces the delay between each iteration
that checks CSTS from 100ms in the shutdown code to the 1 to 2ms range
done during enable, matching the changes from commit 3e98c244 that
were only applied to the enable/disable path.

Signed-off-by: default avatarChristoph Hellwig <hch@lst.de>
Reviewed-by: default avatarKeith Busch <kbusch@kernel.org>
Reviewed-by: default avatarPankaj Raghav <p.raghav@samsung.com>
parent c76b8308

drivers/nvme/host/core.c

+12 −26
Original line number Diff line number Diff line
@@ -2252,16 +2252,17 @@ static const struct block_device_operations nvme_bdev_ops = { 
	.pr_ops		= &nvme_pr_ops,

};



static int nvme_wait_ready(struct nvme_ctrl *ctrl, u32 timeout, bool enabled)

static int nvme_wait_ready(struct nvme_ctrl *ctrl, u32 mask, u32 val,

		u32 timeout, const char *op)

{

	unsigned long timeout_jiffies = ((timeout + 1) * HZ / 2) + jiffies;

	u32 csts, bit = enabled ? NVME_CSTS_RDY : 0;

	unsigned long timeout_jiffies = jiffies + timeout * HZ;

	u32 csts;

	int ret;



	while ((ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) == 0) {

		if (csts == ~0)

			return -ENODEV;

		if ((csts & NVME_CSTS_RDY) == bit)

		if ((csts & mask) == val)

			break;



		usleep_range(1000, 2000);
@@ -2270,7 +2271,7 @@ static int nvme_wait_ready(struct nvme_ctrl *ctrl, u32 timeout, bool enabled) 
		if (time_after(jiffies, timeout_jiffies)) {

			dev_err(ctrl->device,

				"Device not ready; aborting %s, CSTS=0x%x\n",

				enabled ? "initialisation" : "reset", csts);

				op, csts);

			return -ENODEV;

		}

	}
@@ -2297,8 +2298,8 @@ int nvme_disable_ctrl(struct nvme_ctrl *ctrl) 


	if (ctrl->quirks & NVME_QUIRK_DELAY_BEFORE_CHK_RDY)

		msleep(NVME_QUIRK_DELAY_AMOUNT);



	return nvme_wait_ready(ctrl, NVME_CAP_TIMEOUT(ctrl->cap), false);

	return nvme_wait_ready(ctrl, NVME_CSTS_RDY, 0,

			       (NVME_CAP_TIMEOUT(ctrl->cap) + 1) / 2, "reset");

}

EXPORT_SYMBOL_GPL(nvme_disable_ctrl);
@@ -2363,14 +2364,13 @@ int nvme_enable_ctrl(struct nvme_ctrl *ctrl) 
	ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);

	if (ret)

		return ret;

	return nvme_wait_ready(ctrl, timeout, true);

	return nvme_wait_ready(ctrl, NVME_CSTS_RDY, NVME_CSTS_RDY,

			       (timeout + 1) / 2, "initialisation");

}

EXPORT_SYMBOL_GPL(nvme_enable_ctrl);



int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl)

{

	unsigned long timeout = jiffies + (ctrl->shutdown_timeout * HZ);

	u32 csts;

	int ret;



	ctrl->ctrl_config &= ~NVME_CC_SHN_MASK;
@@ -2379,22 +2379,8 @@ int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl) 
	ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);

	if (ret)

		return ret;



	while ((ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) == 0) {

		if ((csts & NVME_CSTS_SHST_MASK) == NVME_CSTS_SHST_CMPLT)

			break;



		msleep(100);

		if (fatal_signal_pending(current))

			return -EINTR;

		if (time_after(jiffies, timeout)) {

			dev_err(ctrl->device,

				"Device shutdown incomplete; abort shutdown\n");

			return -ENODEV;

		}

	}



	return ret;

	return nvme_wait_ready(ctrl, NVME_CSTS_SHST_MASK, NVME_CSTS_SHST_CMPLT,

			       ctrl->shutdown_timeout, "shutdown");

}

EXPORT_SYMBOL_GPL(nvme_shutdown_ctrl);