Commit e6bcfdd7 authored by Thomas Gleixner's avatar Thomas Gleixner Committed by Borislav Petkov (AMD)
Browse files

x86/microcode: Hide the config knob



In reality CONFIG_MICROCODE is enabled in any reasonable configuration when
Intel or AMD support is enabled. Accommodate to reality.

Suggested-by: default avatarBorislav Petkov <bp@alien8.de>
Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
Signed-off-by: default avatarBorislav Petkov (AMD) <bp@alien8.de>
Link: https://lore.kernel.org/r/20230812195727.660453052@linutronix.de
parent e5a81929
Loading
Loading
Loading
Loading
+1 −37
Original line number Diff line number Diff line
@@ -1308,44 +1308,8 @@ config X86_REBOOTFIXUPS
	  Say N otherwise.

config MICROCODE
	bool "CPU microcode loading support"
	default y
	def_bool y
	depends on CPU_SUP_AMD || CPU_SUP_INTEL
	help
	  If you say Y here, you will be able to update the microcode on
	  Intel and AMD processors. The Intel support is for the IA32 family,
	  e.g. Pentium Pro, Pentium II, Pentium III, Pentium 4, Xeon etc. The
	  AMD support is for families 0x10 and later. You will obviously need
	  the actual microcode binary data itself which is not shipped with
	  the Linux kernel.

	  The preferred method to load microcode from a detached initrd is described
	  in Documentation/arch/x86/microcode.rst. For that you need to enable
	  CONFIG_BLK_DEV_INITRD in order for the loader to be able to scan the
	  initrd for microcode blobs.

	  In addition, you can build the microcode into the kernel. For that you
	  need to add the vendor-supplied microcode to the CONFIG_EXTRA_FIRMWARE
	  config option.

config MICROCODE_INTEL
	bool "Intel microcode loading support"
	depends on CPU_SUP_INTEL && MICROCODE
	default MICROCODE
	help
	  This options enables microcode patch loading support for Intel
	  processors.

	  For the current Intel microcode data package go to
	  <https://downloadcenter.intel.com> and search for
	  'Linux Processor Microcode Data File'.

config MICROCODE_AMD
	bool "AMD microcode loading support"
	depends on CPU_SUP_AMD && MICROCODE
	help
	  If you select this option, microcode patch loading support for AMD
	  processors will be enabled.

config MICROCODE_LATE_LOADING
	bool "Late microcode loading (DANGEROUS)"
+3 −3
Original line number Diff line number Diff line
@@ -54,16 +54,16 @@ struct ucode_cpu_info {
extern struct ucode_cpu_info ucode_cpu_info[];
struct cpio_data find_microcode_in_initrd(const char *path, bool use_pa);

#ifdef CONFIG_MICROCODE_INTEL
#ifdef CONFIG_CPU_SUP_INTEL
extern struct microcode_ops * __init init_intel_microcode(void);
#else
static inline struct microcode_ops * __init init_intel_microcode(void)
{
	return NULL;
}
#endif /* CONFIG_MICROCODE_INTEL */
#endif /* CONFIG_CPU_SUP_INTEL */

#ifdef CONFIG_MICROCODE_AMD
#ifdef CONFIG_CPU_SUP_AMD
extern struct microcode_ops * __init init_amd_microcode(void);
extern void __exit exit_amd_microcode(void);
#else
+1 −1
Original line number Diff line number Diff line
@@ -43,7 +43,7 @@ struct microcode_amd {

#define PATCH_MAX_SIZE (3 * PAGE_SIZE)

#ifdef CONFIG_MICROCODE_AMD
#ifdef CONFIG_CPU_SUP_AMD
extern void load_ucode_amd_early(unsigned int cpuid_1_eax);
extern int __init save_microcode_in_initrd_amd(unsigned int family);
void reload_ucode_amd(unsigned int cpu);
+1 −1
Original line number Diff line number Diff line
@@ -71,7 +71,7 @@ static inline u32 intel_get_microcode_revision(void)
	return rev;
}

#ifdef CONFIG_MICROCODE_INTEL
#ifdef CONFIG_CPU_SUP_INTEL
extern void __init load_ucode_intel_bsp(void);
extern void load_ucode_intel_ap(void);
extern void show_ucode_info_early(void);
+2 −2
Original line number Diff line number Diff line
# SPDX-License-Identifier: GPL-2.0-only
microcode-y				:= core.o
obj-$(CONFIG_MICROCODE)			+= microcode.o
microcode-$(CONFIG_MICROCODE_INTEL)	+= intel.o
microcode-$(CONFIG_MICROCODE_AMD)	+= amd.o
microcode-$(CONFIG_CPU_SUP_INTEL)	+= intel.o
microcode-$(CONFIG_CPU_SUP_AMD)		+= amd.o