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This ID is used in DOE headers to identify protocols that are defined within the PCI Express Base Specification, PCIe r6.0, sec 6.30.1.1 table 6-32. Acked-by:Bjorn Helgaas <bhelgaas@google.com> Reviewed-by:
Davidlohr Bueso <dave@stgolabs.net> Reviewed-by:
Dan Williams <dan.j.williams@intel.com> Signed-off-by:
Jonathan Cameron <Jonathan.Cameron@huawei.com> Link: https://lore.kernel.org/r/20220719205249.566684-2-ira.weiny@intel.com Signed-off-by:
Dan Williams <dan.j.williams@intel.com>