Commit e6b17cbd authored by Ping-Ke Shih's avatar Ping-Ke Shih Committed by Kalle Valo
Browse files

rtw89: 8852c: add efuse gain offset parser 



Define efuse struct to access gain offset, and store them for further use
by setting channel.

Signed-off-by: default avatarPing-Ke Shih <pkshih@realtek.com>
Signed-off-by: default avatarKalle Valo <kvalo@kernel.org>
Link: https://lore.kernel.org/r/20220414062027.62638-8-pkshih@realtek.com
parent e885871e

drivers/net/wireless/realtek/rtw89/core.h

+17 −0
Original line number Diff line number Diff line
@@ -74,6 +74,16 @@ enum rtw89_subband { 
	RTW89_SUBBAND_NR,

};



enum rtw89_gain_offset {

	RTW89_GAIN_OFFSET_2G_CCK,

	RTW89_GAIN_OFFSET_2G_OFDM,

	RTW89_GAIN_OFFSET_5G_LOW,

	RTW89_GAIN_OFFSET_5G_MID,

	RTW89_GAIN_OFFSET_5G_HIGH,



	RTW89_GAIN_OFFSET_NR,

};



enum rtw89_hci_type {

	RTW89_HCI_TYPE_PCIE,

	RTW89_HCI_TYPE_USB,
@@ -3035,6 +3045,12 @@ struct rtw89_phy_bb_gain_info { 
		       [RTW89_BB_RXSC_NUM_160];

};



struct rtw89_phy_efuse_gain {

	bool offset_valid;

	s8 offset[RF_PATH_MAX][RTW89_GAIN_OFFSET_NR]; /* S(8, 0) */

	s8 offset_base[RTW89_PHY_MAX]; /* S(8, 4) */

};



struct rtw89_dev {

	struct ieee80211_hw *hw;

	struct device *dev;
@@ -3098,6 +3114,7 @@ struct rtw89_dev { 
	struct rtw89_dig_info dig;

	struct rtw89_phy_ch_info ch_info;

	struct rtw89_phy_bb_gain_info bb_gain;

	struct rtw89_phy_efuse_gain efuse_gain;



	struct delayed_work track_work;

	struct delayed_work coex_act1_work;

drivers/net/wireless/realtek/rtw89/reg.h

+19 −0
Original line number Diff line number Diff line
@@ -3470,6 +3470,8 @@ 
#define B_TXFIR_CEF GENMASK(23, 0)

#define R_11B_RX_V1 0x2320

#define B_11B_RXCCA_DIS_V1 BIT(0)

#define R_RPL_OFST 0x2340

#define B_RPL_OFST_MASK GENMASK(14, 8)

#define R_RXCCA 0x2344

#define B_RXCCA_DIS BIT(31)

#define R_RXCCA_V1 0x2320
@@ -3570,6 +3572,11 @@ 
#define B_PATH0_P20_FOLLOW_BY_PAGCUGC_EN_MSK BIT(5)

#define R_PATH0_S20_FOLLOW_BY_PAGCUGC 0x46A4

#define B_PATH0_S20_FOLLOW_BY_PAGCUGC_EN_MSK BIT(5)

#define R_PATH0_G_TIA0_LNA6_OP1DB_V1 0x4694

#define B_PATH0_G_TIA0_LNA6_OP1DB_V1 GENMASK(7, 0)

#define R_PATH0_G_TIA1_LNA6_OP1DB_V1 0x4694

#define B_PATH0_R_G_OFST_MASK GENMASK(23, 16)

#define B_PATH0_G_TIA1_LNA6_OP1DB_V1 GENMASK(15, 8)

#define R_P0_NBIIDX 0x469C

#define B_P0_NBIIDX_VAL GENMASK(11, 0)

#define B_P0_NBIIDX_NOTCH_EN BIT(12)
@@ -3587,6 +3594,8 @@ 
#define B_PATH1_P20_FOLLOW_BY_PAGCUGC_EN_MSK BIT(5)

#define R_PATH1_S20_FOLLOW_BY_PAGCUGC 0x4778

#define B_PATH1_S20_FOLLOW_BY_PAGCUGC_EN_MSK BIT(5)

#define R_PATH1_G_TIA0_LNA6_OP1DB_V1 0x4778

#define B_PATH1_G_TIA0_LNA6_OP1DB_V1 GENMASK(7, 0)

#define R_P1_NBIIDX 0x4770

#define B_P1_NBIIDX_VAL GENMASK(11, 0)

#define B_P1_NBIIDX_NOTCH_EN BIT(12)
@@ -3601,6 +3610,14 @@ 
#define R_CHBW_MOD 0x4978

#define B_CHBW_MOD_PRICH GENMASK(11, 8)

#define B_CHBW_MOD_SBW GENMASK(13, 12)

#define R_RPL_BIAS_COMP 0x4DF0

#define B_RPL_BIAS_COMP_MASK GENMASK(7, 0)

#define R_RPL_PATHAB 0x4E0C

#define B_RPL_PATHB_MASK GENMASK(23, 16)

#define B_RPL_PATHA_MASK GENMASK(15, 8)

#define R_RSSI_M_PATHAB 0x4E2C

#define B_RSSI_M_PATHB_MASK GENMASK(15, 8)

#define B_RSSI_M_PATHA_MASK GENMASK(7, 0)

#define R_DCFO_COMP_S0_V1 0x4A40

#define B_DCFO_COMP_S0_V1_MSK GENMASK(13, 0)

#define R_BMODE_PDTH_V1 0x4B64
@@ -3669,6 +3686,8 @@ 
#define B_S0_DACKQ7_K GENMASK(15, 8)

#define R_S0_DACKQ8 0x5E98

#define B_S0_DACKQ8_K GENMASK(15, 8)

#define R_RPL_BIAS_COMP1 0x6DF0

#define B_RPL_BIAS_COMP1_MASK GENMASK(7, 0)

#define R_P1_TMETER 0x7810

#define B_P1_TMETER GENMASK(15, 10)

#define B_P1_TMETER_DIS BIT(16)

drivers/net/wireless/realtek/rtw89/rtw8852c.c

+101 −0
Original line number Diff line number Diff line
@@ -317,6 +317,41 @@ static void rtw8852c_efuse_parsing_tssi(struct rtw89_dev *rtwdev, 
	}

}



static bool _decode_efuse_gain(u8 data, s8 *high, s8 *low)

{

	if (high)

		*high = sign_extend32(FIELD_GET(GENMASK(7,  4), data), 3);

	if (low)

		*low = sign_extend32(FIELD_GET(GENMASK(3,  0), data), 3);



	return data != 0xff;

}



static void rtw8852c_efuse_parsing_gain_offset(struct rtw89_dev *rtwdev,

					       struct rtw8852c_efuse *map)

{

	struct rtw89_phy_efuse_gain *gain = &rtwdev->efuse_gain;

	bool valid = false;



	valid |= _decode_efuse_gain(map->rx_gain_2g_cck,

				    &gain->offset[RF_PATH_A][RTW89_GAIN_OFFSET_2G_CCK],

				    &gain->offset[RF_PATH_B][RTW89_GAIN_OFFSET_2G_CCK]);

	valid |= _decode_efuse_gain(map->rx_gain_2g_ofdm,

				    &gain->offset[RF_PATH_A][RTW89_GAIN_OFFSET_2G_OFDM],

				    &gain->offset[RF_PATH_B][RTW89_GAIN_OFFSET_2G_OFDM]);

	valid |= _decode_efuse_gain(map->rx_gain_5g_low,

				    &gain->offset[RF_PATH_A][RTW89_GAIN_OFFSET_5G_LOW],

				    &gain->offset[RF_PATH_B][RTW89_GAIN_OFFSET_5G_LOW]);

	valid |= _decode_efuse_gain(map->rx_gain_5g_mid,

				    &gain->offset[RF_PATH_A][RTW89_GAIN_OFFSET_5G_MID],

				    &gain->offset[RF_PATH_B][RTW89_GAIN_OFFSET_5G_MID]);

	valid |= _decode_efuse_gain(map->rx_gain_5g_high,

				    &gain->offset[RF_PATH_A][RTW89_GAIN_OFFSET_5G_HIGH],

				    &gain->offset[RF_PATH_B][RTW89_GAIN_OFFSET_5G_HIGH]);



	gain->offset_valid = valid;

}



static int rtw8852c_read_efuse(struct rtw89_dev *rtwdev, u8 *log_map)

{

	struct rtw89_efuse *efuse = &rtwdev->efuse;
@@ -327,6 +362,7 @@ static int rtw8852c_read_efuse(struct rtw89_dev *rtwdev, u8 *log_map) 
	efuse->country_code[0] = map->country_code[0];

	efuse->country_code[1] = map->country_code[1];

	rtw8852c_efuse_parsing_tssi(rtwdev, map);

	rtw8852c_efuse_parsing_gain_offset(rtwdev, map);



	switch (rtwdev->hci.type) {

	case RTW89_HCI_TYPE_PCIE:
@@ -673,6 +709,63 @@ static void rtw8852c_set_gain_error(struct rtw89_dev *rtwdev, 
	}

}



static void rtw8852c_set_gain_offset(struct rtw89_dev *rtwdev,

				     const struct rtw89_channel_params *param,

				     enum rtw89_phy_idx phy_idx,

				     enum rtw89_rf_path path)

{

	static const u32 rssi_ofst_addr[2] = {R_PATH0_G_TIA0_LNA6_OP1DB_V1,

					      R_PATH1_G_TIA0_LNA6_OP1DB_V1};

	static const u32 rpl_mask[2] = {B_RPL_PATHA_MASK, B_RPL_PATHB_MASK};

	static const u32 rpl_tb_mask[2] = {B_RSSI_M_PATHA_MASK, B_RSSI_M_PATHB_MASK};

	struct rtw89_phy_efuse_gain *efuse_gain = &rtwdev->efuse_gain;

	enum rtw89_gain_offset gain_band;

	s32 offset_q0, offset_base_q4;

	s32 tmp = 0;



	if (!efuse_gain->offset_valid)

		return;



	if (rtwdev->dbcc_en && path == RF_PATH_B)

		phy_idx = RTW89_PHY_1;



	if (param->band_type == RTW89_BAND_2G) {

		offset_q0 = efuse_gain->offset[path][RTW89_GAIN_OFFSET_2G_CCK];

		offset_base_q4 = efuse_gain->offset_base[phy_idx];



		tmp = clamp_t(s32, (-offset_q0 << 3) + (offset_base_q4 >> 1),

			      S8_MIN >> 1, S8_MAX >> 1);

		rtw89_phy_write32_mask(rtwdev, R_RPL_OFST, B_RPL_OFST_MASK, tmp & 0x7f);

	}



	switch (param->subband_type) {

	default:

	case RTW89_CH_2G:

		gain_band = RTW89_GAIN_OFFSET_2G_OFDM;

		break;

	case RTW89_CH_5G_BAND_1:

		gain_band = RTW89_GAIN_OFFSET_5G_LOW;

		break;

	case RTW89_CH_5G_BAND_3:

		gain_band = RTW89_GAIN_OFFSET_5G_MID;

		break;

	case RTW89_CH_5G_BAND_4:

		gain_band = RTW89_GAIN_OFFSET_5G_HIGH;

		break;

	}



	offset_q0 = -efuse_gain->offset[path][gain_band];

	offset_base_q4 = efuse_gain->offset_base[phy_idx];



	tmp = (offset_q0 << 2) + (offset_base_q4 >> 2);

	tmp = clamp_t(s32, -tmp, S8_MIN, S8_MAX);

	rtw89_phy_write32_mask(rtwdev, rssi_ofst_addr[path], B_PATH0_R_G_OFST_MASK, tmp & 0xff);



	tmp = clamp_t(s32, offset_q0 << 4, S8_MIN, S8_MAX);

	rtw89_phy_write32_idx(rtwdev, R_RPL_PATHAB, rpl_mask[path], tmp & 0xff, phy_idx);

	rtw89_phy_write32_idx(rtwdev, R_RSSI_M_PATHAB, rpl_tb_mask[path], tmp & 0xff, phy_idx);

}



static void rtw8852c_bb_reset_all(struct rtw89_dev *rtwdev,

				  enum rtw89_phy_idx phy_idx)

{
@@ -844,6 +937,8 @@ static void rtw8852c_bb_macid_ctrl_init(struct rtw89_dev *rtwdev, 


static void rtw8852c_bb_sethw(struct rtw89_dev *rtwdev)

{

	struct rtw89_phy_efuse_gain *gain = &rtwdev->efuse_gain;



	rtw89_phy_write32_set(rtwdev, R_DBCC_80P80_SEL_EVM_RPT,

			      B_DBCC_80P80_SEL_EVM_RPT_EN);

	rtw89_phy_write32_set(rtwdev, R_DBCC_80P80_SEL_EVM_RPT2,
@@ -851,6 +946,12 @@ static void rtw8852c_bb_sethw(struct rtw89_dev *rtwdev) 


	rtw8852c_bb_macid_ctrl_init(rtwdev, RTW89_PHY_0);

	rtw8852c_bb_gpio_init(rtwdev);



	/* read these registers after loading BB parameters */

	gain->offset_base[RTW89_PHY_0] =

		rtw89_phy_read32_mask(rtwdev, R_RPL_BIAS_COMP, B_RPL_BIAS_COMP_MASK);

	gain->offset_base[RTW89_PHY_1] =

		rtw89_phy_read32_mask(rtwdev, R_RPL_BIAS_COMP1, B_RPL_BIAS_COMP1_MASK);

}



static

drivers/net/wireless/realtek/rtw89/rtw8852c.h

+14 −4
Original line number Diff line number Diff line
@@ -59,13 +59,23 @@ struct rtw8852c_efuse { 
	u8 rsvd7[3];

	u8 path_a_therm;

	u8 path_b_therm;

	u8 rsvd8[46];

	u8 rsvd8[2];

	u8 rx_gain_2g_ofdm;

	u8 rsvd9;

	u8 rx_gain_2g_cck;

	u8 rsvd10;

	u8 rx_gain_5g_low;

	u8 rsvd11;

	u8 rx_gain_5g_mid;

	u8 rsvd12;

	u8 rx_gain_5g_high;

	u8 rsvd13[35];

	u8 bw40_1s_tssi_6g_a[TSSI_MCS_6G_CH_GROUP_NUM];

	u8 rsvd9[10];

	u8 rsvd14[10];

	u8 bw40_1s_tssi_6g_b[TSSI_MCS_6G_CH_GROUP_NUM];

	u8 rsvd10[110];

	u8 rsvd15[110];

	u8 channel_plan_6g;

	u8 rsvd11[71];

	u8 rsvd16[71];

	union {

		struct rtw8852c_u_efuse u;

		struct rtw8852c_e_efuse e;