Commit e6a3a65b authored by Dipen Patel's avatar Dipen Patel Committed by Thierry Reding
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dt-bindings: Add HTE bindings



Introduces HTE devicetree binding details for the HTE subsystem. It
includes examples for the consumers, binding details for the providers
and specific binding details for the Tegra194 based HTE providers.

Signed-off-by: default avatarDipen Patel <dipenp@nvidia.com>
Reviewed-by: default avatarLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
parent 09574cca
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/hte/hardware-timestamps-common.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Hardware timestamp providers

maintainers:
  - Dipen Patel <dipenp@nvidia.com>

description:
  Some devices/SoCs have hardware time stamping engines which can use hardware
  means to timestamp entity in realtime. The entity could be anything from
  GPIOs, IRQs, Bus and so on. The hardware timestamp engine (HTE) present
  itself as a provider with the bindings described in this document.

properties:
  $nodename:
    pattern: "^timestamp(@.*|-[0-9a-f])?$"

  "#timestamp-cells":
    description:
      Number of cells in a HTE specifier.

required:
  - "#timestamp-cells"

additionalProperties: true
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/hte/hte-consumer.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: HTE Consumer Device Tree Bindings

maintainers:
  - Dipen Patel <dipenp@nvidia.com>

select: true

properties:
  timestamps:
    $ref: /schemas/types.yaml#/definitions/phandle-array
    description:
      The list of HTE provider phandle. The first cell must represent the
      provider phandle followed by the line identifiers. The meaning of the
      line identifier and exact number of arguments must be specified in the
      HTE provider device tree binding document.

  timestamp-names:
    $ref: /schemas/types.yaml#/definitions/string-array
    description:
      An optional string property to label each line specifier present in the
      timestamp property.

dependencies:
  timestamp-names: [ timestamps ]

additionalProperties: true

examples:
  - |
    hte_tegra_consumer {
              timestamps = <&tegra_hte_aon 0x9>, <&tegra_hte_lic 0x19>;
              timestamp-names = "hte-gpio", "hte-i2c";
    };
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/hte/nvidia,tegra194-hte.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Tegra194 on chip generic hardware timestamping engine (HTE)

maintainers:
  - Dipen Patel <dipenp@nvidia.com>

description:
  Tegra SoC has two instances of generic hardware timestamping engines (GTE)
  known as GTE GPIO and GTE IRQ, which can monitor subset of GPIO and on chip
  IRQ lines for the state change respectively, upon detection it will record
  timestamp (taken from system counter) in its internal hardware FIFO. It has
  a bitmap array arranged in 32bit slices where each bit represent signal/line
  to enable or disable for the hardware timestamping. The GTE GPIO monitors
  GPIO lines from the AON (always on) GPIO controller.

properties:
  compatible:
    enum:
      - nvidia,tegra194-gte-aon
      - nvidia,tegra194-gte-lic

  reg:
    maxItems: 1

  interrupts:
    maxItems: 1

  nvidia,int-threshold:
    $ref: /schemas/types.yaml#/definitions/uint32
    description:
      HTE device generates its interrupt based on this u32 FIFO threshold
      value. The recommended value is 1.
    minimum: 1
    maximum: 256

  nvidia,slices:
    $ref: /schemas/types.yaml#/definitions/uint32
    description:
      HTE lines are arranged in 32 bit slice where each bit represents different
      line/signal that it can enable/configure for the timestamp. It is u32
      property and depends on the HTE instance in the chip. The value 3 is for
      GPIO GTE and 11 for IRQ GTE.
    enum: [3, 11]

  '#timestamp-cells':
    description:
      This represents number of line id arguments as specified by the
      consumers. For the GTE IRQ, this is IRQ number as mentioned in the
      SoC technical reference manual. For the GTE GPIO, its value is same as
      mentioned in the nvidia GPIO device tree binding document.
    const: 1

required:
  - compatible
  - reg
  - interrupts
  - nvidia,slices
  - "#timestamp-cells"

additionalProperties: false

examples:
  - |
    tegra_hte_aon: timestamp@c1e0000 {
              compatible = "nvidia,tegra194-gte-aon";
              reg = <0xc1e0000 0x10000>;
              interrupts = <0 13 0x4>;
              nvidia,int-threshold = <1>;
              nvidia,slices = <3>;
              #timestamp-cells = <1>;
    };

  - |
    tegra_hte_lic: timestamp@3aa0000 {
              compatible = "nvidia,tegra194-gte-lic";
              reg = <0x3aa0000 0x10000>;
              interrupts = <0 11 0x4>;
              nvidia,int-threshold = <1>;
              nvidia,slices = <11>;
              #timestamp-cells = <1>;
    };

...