Commit e695bed2 authored by Alex Elder's avatar Alex Elder Committed by David S. Miller
Browse files

net: ipa: store BCR register values in config data



The backward compatibility register value is a platform-specific
property that is not stored in the platform data.  Create a data
field where this can be represented, and get rid ipa_reg_bcr_val().

This register is not present starting with IPA v4.5.

Signed-off-by: default avatarAlex Elder <elder@linaro.org>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 862d3f2c
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+1 −0
Original line number Diff line number Diff line
@@ -349,6 +349,7 @@ static const struct ipa_clock_data ipa_clock_data = {
/* Configuration data for the SC7180 SoC. */
const struct ipa_data ipa_data_sc7180 = {
	.version	= IPA_VERSION_4_2,
	/* backward_compat value is 0 */
	.qsb_count	= ARRAY_SIZE(ipa_qsb_data),
	.qsb_data	= ipa_qsb_data,
	.endpoint_count	= ARRAY_SIZE(ipa_gsi_endpoint_data),
+5 −0
Original line number Diff line number Diff line
@@ -397,6 +397,11 @@ static const struct ipa_clock_data ipa_clock_data = {
/* Configuration data for the SDM845 SoC. */
const struct ipa_data ipa_data_sdm845 = {
	.version	= IPA_VERSION_3_5_1,
	.backward_compat = BCR_CMDQ_L_LACK_ONE_ENTRY_FMASK |
			   BCR_TX_NOT_USING_BRESP_FMASK |
			   BCR_SUSPEND_L2_IRQ_FMASK |
			   BCR_HOLB_DROP_L2_IRQ_FMASK |
			   BCR_DUAL_TX_FMASK,
	.qsb_count	= ARRAY_SIZE(ipa_qsb_data),
	.qsb_data	= ipa_qsb_data,
	.endpoint_count	= ARRAY_SIZE(ipa_gsi_endpoint_data),
+2 −0
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@@ -279,6 +279,7 @@ struct ipa_clock_data {
/**
 * struct ipa_data - combined IPA/GSI configuration data
 * @version:		IPA hardware version
 * @backward_compat:	BCR register value (prior to IPA v4.5 only)
 * @qsb_count:		number of entries in the qsb_data array
 * @qsb_data:		Qualcomm System Bus configuration data
 * @endpoint_count:	number of entries in the endpoint_data array
@@ -289,6 +290,7 @@ struct ipa_clock_data {
 */
struct ipa_data {
	enum ipa_version version;
	u32 backward_compat;
	u32 qsb_count;		/* number of entries in qsb_data[] */
	const struct ipa_qsb_data *qsb_data;
	u32 endpoint_count;	/* number of entries in endpoint_data[] */
+2 −2
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@@ -397,9 +397,9 @@ static void ipa_hardware_config(struct ipa *ipa, const struct ipa_data *data)
	u32 granularity;
	u32 val;

	/* IPA v4.5 has no backward compatibility register */
	/* IPA v4.5+ has no backward compatibility register */
	if (version < IPA_VERSION_4_5) {
		val = ipa_reg_bcr_val(version);
		val = data->backward_compat;
		iowrite32(val, ipa->reg_virt + IPA_REG_BCR_OFFSET);
	}

+0 −21
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@@ -235,27 +235,6 @@ static inline u32 ipa_reg_state_aggr_active_offset(enum ipa_version version)
#define BCR_FILTER_PREFETCH_EN_FMASK		GENMASK(8, 8)
#define BCR_ROUTER_PREFETCH_EN_FMASK		GENMASK(9, 9)

/* Backward compatibility register value to use for each version */
static inline u32 ipa_reg_bcr_val(enum ipa_version version)
{
	if (version == IPA_VERSION_3_5_1)
		return BCR_CMDQ_L_LACK_ONE_ENTRY_FMASK |
			BCR_TX_NOT_USING_BRESP_FMASK |
			BCR_SUSPEND_L2_IRQ_FMASK |
			BCR_HOLB_DROP_L2_IRQ_FMASK |
			BCR_DUAL_TX_FMASK;

	if (version == IPA_VERSION_4_0 || version == IPA_VERSION_4_1)
		return BCR_CMDQ_L_LACK_ONE_ENTRY_FMASK |
			BCR_SUSPEND_L2_IRQ_FMASK |
			BCR_HOLB_DROP_L2_IRQ_FMASK |
			BCR_DUAL_TX_FMASK;

	/* assert(version != IPA_VERSION_4_5); */

	return 0x00000000;
}

/* The value of the next register must be a multiple of 8 (bottom 3 bits 0) */
#define IPA_REG_LOCAL_PKT_PROC_CNTXT_OFFSET		0x000001e8