Commit e67a09d1 authored by Jernej Skrabec's avatar Jernej Skrabec Committed by Mauro Carvalho Chehab
Browse files

media: hantro: vp9: use double buffering if needed 



Some G2 variants need double buffering to be enabled in order to work
correctly, like that found in Allwinner H6 SoC.

Add platform quirk for that.

Reviewed-by: default avatarAndrzej Pietrasiewicz <andrzej.p@collabora.com>
Signed-off-by: default avatarJernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: default avatarHans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: default avatarMauro Carvalho Chehab <mchehab+huawei@kernel.org>
parent ea71631b

drivers/staging/media/hantro/hantro.h

+2 −0
Original line number Diff line number Diff line
@@ -73,6 +73,7 @@ struct hantro_irq { 
 * @num_clocks:			number of clocks in the array

 * @reg_names:			array of register range names

 * @num_regs:			number of register range names in the array

 * @double_buffer:		core needs double buffering

 */

struct hantro_variant {

	unsigned int enc_offset;
@@ -94,6 +95,7 @@ struct hantro_variant { 
	int num_clocks;

	const char * const *reg_names;

	int num_regs;

	unsigned int double_buffer : 1;

};



/**

drivers/staging/media/hantro/hantro_g2_regs.h

+1 −0
Original line number Diff line number Diff line
@@ -270,6 +270,7 @@ 
#define g2_apf_threshold	G2_DEC_REG(55, 0, 0xffff)



#define g2_clk_gate_e		G2_DEC_REG(58, 16, 0x1)

#define g2_double_buffer_e	G2_DEC_REG(58, 15, 0x1)

#define g2_buswidth		G2_DEC_REG(58, 8,  0x7)

#define g2_max_burst		G2_DEC_REG(58, 0,  0xff)

drivers/staging/media/hantro/hantro_g2_vp9_dec.c

+2 −0
Original line number Diff line number Diff line
@@ -847,6 +847,8 @@ config_registers(struct hantro_ctx *ctx, const struct v4l2_ctrl_vp9_frame *dec_p 
	hantro_reg_write(ctx->dev, &g2_clk_gate_e, 1);

	hantro_reg_write(ctx->dev, &g2_max_cb_size, 6);

	hantro_reg_write(ctx->dev, &g2_min_cb_size, 3);

	if (ctx->dev->variant->double_buffer)

		hantro_reg_write(ctx->dev, &g2_double_buffer_e, 1);



	config_output(ctx, dst, dec_params);