Unverified Commit e64f737a authored by Heiko Stuebner's avatar Heiko Stuebner Committed by Palmer Dabbelt
Browse files

riscv: integrate alternatives better into the main architecture 



Right now the alternatives need to be explicitly enabled and
erratas are limited to SiFive ones.

We want to use alternatives not only for patching soc erratas,
but in the future also for handling different behaviour depending
on the existence of future extensions.

So move the core alternatives over to the kernel subdirectory
and move the CONFIG_RISCV_ALTERNATIVE to be a hidden symbol
which we expect relevant erratas and extensions to just select
if needed.

Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
Reviewed-by: default avatarPhilipp Tomsich <philipp.tomsich@vrull.eu>
Link: https://lore.kernel.org/r/20220511192921.2223629-2-heiko@sntech.de


Signed-off-by: default avatarPalmer Dabbelt <palmer@rivosinc.com>
parent 31231092

arch/riscv/Kconfig

+9 −0
Original line number Diff line number Diff line
@@ -324,6 +324,15 @@ config NODES_SHIFT 
	  Specify the maximum number of NUMA Nodes available on the target

	  system.  Increases memory reserved to accommodate various tables.



config RISCV_ALTERNATIVE

	bool

	depends on !XIP_KERNEL

	help

	  This Kconfig allows the kernel to automatically patch the

	  errata required by the execution platform at run time. The

	  code patching is performed once in the boot stages. It means

	  that the overhead from this mechanism is just taken once.



config RISCV_ISA_C

	bool "Emit compressed instructions when building Linux"

	default y

arch/riscv/Kconfig.erratas

+2 −11
Original line number Diff line number Diff line 
menu "CPU errata selection"



config RISCV_ERRATA_ALTERNATIVE

	bool "RISC-V alternative scheme"

	depends on !XIP_KERNEL

	default y

	help

	  This Kconfig allows the kernel to automatically patch the

	  errata required by the execution platform at run time. The

	  code patching is performed once in the boot stages. It means

	  that the overhead from this mechanism is just taken once.



config ERRATA_SIFIVE

	bool "SiFive errata"

	depends on RISCV_ERRATA_ALTERNATIVE

	depends on !XIP_KERNEL

	select RISCV_ALTERNATIVE

	help

	  All SiFive errata Kconfig depend on this Kconfig. Disabling

	  this Kconfig will disable all SiFive errata. Please say "Y"

arch/riscv/Kconfig.socs

+0 −1
Original line number Diff line number Diff line
@@ -14,7 +14,6 @@ config SOC_SIFIVE 
	select CLK_SIFIVE

	select CLK_SIFIVE_PRCI

	select SIFIVE_PLIC

	select RISCV_ERRATA_ALTERNATIVE if !XIP_KERNEL

	select ERRATA_SIFIVE if !XIP_KERNEL

	help

	  This enables support for SiFive SoC platform hardware.

arch/riscv/Makefile

+1 −1
Original line number Diff line number Diff line
@@ -103,7 +103,7 @@ endif 


head-y := arch/riscv/kernel/head.o



core-$(CONFIG_RISCV_ERRATA_ALTERNATIVE) += arch/riscv/errata/

core-y += arch/riscv/errata/

core-$(CONFIG_KVM) += arch/riscv/kvm/



libs-y += arch/riscv/lib/

arch/riscv/errata/Makefile

+0 −1
Original line number Diff line number Diff line 
obj-y	+= alternative.o

obj-$(CONFIG_ERRATA_SIFIVE) += sifive/