Commit e62f31e1 authored by Gustavo Sousa's avatar Gustavo Sousa Committed by Matt Roper
Browse files

drm/i915/xelp: Add Wa_1806527549 



Workaround to be applied to platforms using XE_LP graphics.

BSpec: 52890
Signed-off-by: default avatarGustavo Sousa <gustavo.sousa@intel.com>
Reviewed-by: default avatarLucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: default avatarMatt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20221019161334.119885-1-gustavo.sousa@intel.com
parent 5f8a3f65

drivers/gpu/drm/i915/gt/intel_gt_regs.h

+1 −0
Original line number Diff line number Diff line
@@ -440,6 +440,7 @@ 
#define HIZ_CHICKEN				_MMIO(0x7018)

#define   CHV_HZ_8X8_MODE_IN_1X			REG_BIT(15)

#define   DG1_HZ_READ_SUPPRESSION_OPTIMIZATION_DISABLE	REG_BIT(14)

#define   HZ_DEPTH_TEST_LE_GE_OPT_DISABLE	REG_BIT(13)

#define   BDW_HIZ_POWER_COMPILER_CLOCK_GATING_DISABLE	REG_BIT(3)



#define GEN8_L3CNTLREG				_MMIO(0x7034)

drivers/gpu/drm/i915/gt/intel_workarounds.c

+6 −0
Original line number Diff line number Diff line
@@ -660,6 +660,8 @@ static void gen12_ctx_gt_tuning_init(struct intel_engine_cs *engine, 
static void gen12_ctx_workarounds_init(struct intel_engine_cs *engine,

				       struct i915_wa_list *wal)

{

	struct drm_i915_private *i915 = engine->i915;



	gen12_ctx_gt_tuning_init(engine, wal);



	/*
@@ -693,6 +695,10 @@ static void gen12_ctx_workarounds_init(struct intel_engine_cs *engine, 
	       FF_MODE2_GS_TIMER_MASK,

	       FF_MODE2_GS_TIMER_224,

	       0, false);



	if (!IS_DG1(i915))

		/* Wa_1806527549 */

		wa_masked_en(wal, HIZ_CHICKEN, HZ_DEPTH_TEST_LE_GE_OPT_DISABLE);

}



static void dg1_ctx_workarounds_init(struct intel_engine_cs *engine,