Commit e5f415bf authored by Lucas De Marchi's avatar Lucas De Marchi
Browse files

drm/i915: Add missing mask when reading GEN12_DSMBASE 



DSMBASE register is defined so BDSM bitfield contains the bits 63 to 20
of the base address of stolen. For the supported platforms bits 0-19 are
zero but that may not be true in future. Add the missing mask.

v2: Use REG_GENMASK64()

Acked-by: default avatarAravind Iddamsetty <aravind.iddamsetty@intel.com>
Reviewed-by: default avatarCaz Yokoyama <caz@caztech.com>
Reviewed-by: default avatarWayne Boyer <wayne.boyer@intel.com>
Signed-off-by: default avatarLucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220915-stolen-v2-1-20ff797de047@intel.com
parent 07a70f38

drivers/gpu/drm/i915/gem/i915_gem_stolen.c

+1 −1
Original line number Diff line number Diff line
@@ -809,7 +809,7 @@ i915_gem_stolen_lmem_setup(struct drm_i915_private *i915, u16 type, 
		return ERR_PTR(-ENODEV);



	/* Use DSM base address instead for stolen memory */

	dsm_base = intel_uncore_read64(uncore, GEN12_DSMBASE);

	dsm_base = intel_uncore_read64(uncore, GEN12_DSMBASE) & GEN12_BDSM_MASK;

	if (IS_DG1(uncore->i915)) {

		lmem_size = pci_resource_len(pdev, 2);

		if (WARN_ON(lmem_size < dsm_base))

drivers/gpu/drm/i915/i915_reg.h

+1 −0
Original line number Diff line number Diff line
@@ -8501,6 +8501,7 @@ enum skl_power_gate { 


#define GEN12_GSMBASE			_MMIO(0x108100)

#define GEN12_DSMBASE			_MMIO(0x1080C0)

#define   GEN12_BDSM_MASK		REG_GENMASK64(63, 20)



#define XEHP_CLOCK_GATE_DIS		_MMIO(0x101014)

#define   SGSI_SIDECLK_DIS		REG_BIT(17)