Commit e5f020ad authored by Vinicius Costa Gomes's avatar Vinicius Costa Gomes Committed by Tony Nguyen
Browse files

igc: Remove references to SYSTIMR register 



In i225, it's no longer necessary to use the SYSTIMR register to
latch the timer value, the timestamp is latched when SYSTIML is read.

Signed-off-by: default avatarVinicius Costa Gomes <vinicius.gomes@intel.com>
Tested-by: default avatarAaron Brown <aaron.f.brown@intel.com>
Signed-off-by: default avatarTony Nguyen <anthony.l.nguyen@intel.com>
parent 40edc734

drivers/net/ethernet/intel/igc/igc_ptp.c

+2 −10
Original line number Diff line number Diff line
@@ -22,11 +22,7 @@ static void igc_ptp_read_i225(struct igc_adapter *adapter, 
	struct igc_hw *hw = &adapter->hw;

	u32 sec, nsec;



	/* The timestamp latches on lowest register read. For I210/I211, the

	 * lowest register is SYSTIMR. Since we only need to provide nanosecond

	 * resolution, we can ignore it.

	 */

	rd32(IGC_SYSTIMR);

	/* The timestamp is latched when SYSTIML is read. */

	nsec = rd32(IGC_SYSTIML);

	sec = rd32(IGC_SYSTIMH);
@@ -39,9 +35,6 @@ static void igc_ptp_write_i225(struct igc_adapter *adapter, 
{

	struct igc_hw *hw = &adapter->hw;



	/* Writing the SYSTIMR register is not necessary as it only

	 * provides sub-nanosecond resolution.

	 */

	wr32(IGC_SYSTIML, ts->tv_nsec);

	wr32(IGC_SYSTIMH, ts->tv_sec);

}
@@ -102,10 +95,9 @@ static int igc_ptp_gettimex64_i225(struct ptp_clock_info *ptp, 
	spin_lock_irqsave(&igc->tmreg_lock, flags);



	ptp_read_system_prets(sts);

	rd32(IGC_SYSTIMR);

	ptp_read_system_postts(sts);

	ts->tv_nsec = rd32(IGC_SYSTIML);

	ts->tv_sec = rd32(IGC_SYSTIMH);

	ptp_read_system_postts(sts);



	spin_unlock_irqrestore(&igc->tmreg_lock, flags);