Unverified Commit e590ad24 authored by Krishna chaitanya chundru's avatar Krishna chaitanya chundru Committed by Krzysztof Wilczyński
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dt-bindings: PCI: qcom: ep: Add interconnects path 

Some platforms may not boot if a device driver doesn't
initialize the interconnect path. Mostly it is handled
by the bootloader but we have starting to see cases
where bootloader simply ignores them.

Add the "pcie-mem" & "cpu-pcie" interconnect path as a required
property to the bindings.

Link: https://lore.kernel.org/linux-pci/1689751218-24492-2-git-send-email-quic_krichai@quicinc.com


Signed-off-by: default avatarKrishna chaitanya chundru <quic_krichai@quicinc.com>
Signed-off-by: default avatarKrzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: default avatarManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
parent 823de40c

Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml

+15 −0
Original line number Diff line number Diff line
@@ -71,6 +71,14 @@ properties: 
    description: GPIO used as WAKE# output signal

    maxItems: 1



  interconnects:

    maxItems: 2



  interconnect-names:

    items:

      - const: pcie-mem

      - const: cpu-pcie



  resets:

    maxItems: 1
@@ -98,6 +106,8 @@ required: 
  - interrupts

  - interrupt-names

  - reset-gpios

  - interconnects

  - interconnect-names

  - resets

  - reset-names

  - power-domains
@@ -167,7 +177,9 @@ examples: 
  - |

    #include <dt-bindings/clock/qcom,gcc-sdx55.h>

    #include <dt-bindings/gpio/gpio.h>

    #include <dt-bindings/interconnect/qcom,sdx55.h>

    #include <dt-bindings/interrupt-controller/arm-gic.h>



    pcie_ep: pcie-ep@1c00000 {

        compatible = "qcom,sdx55-pcie-ep";

        reg = <0x01c00000 0x3000>,
@@ -194,6 +206,9 @@ examples: 
        interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>,

                     <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;

        interrupt-names = "global", "doorbell";

        interconnects = <&system_noc MASTER_PCIE &mc_virt SLAVE_EBI_CH0>,

                        <&mem_noc MASTER_AMPSS_M0 &system_noc SLAVE_PCIE_0>;

        interconnect-names = "pcie-mem", "cpu-pcie";

        reset-gpios = <&tlmm 57 GPIO_ACTIVE_LOW>;

        wake-gpios = <&tlmm 53 GPIO_ACTIVE_LOW>;

        resets = <&gcc GCC_PCIE_BCR>;