Commit e4c8d018 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'soc-drivers-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc 

Pull ARM SoC driver updates from Arnd Bergmann:
 "Nothing surprising in the SoC specific drivers, with the usual
  updates:

   - Added or improved SoC driver support for Tegra234, Exynos4121,
     RK3588, as well as multiple Mediatek and Qualcomm chips

   - SCMI firmware gains support for multiple SMC/HVC transport and
     version 3.2 of the protocol

   - Cleanups amd minor changes for the reset controller, memory
     controller, firmware and sram drivers

   - Minor changes to amd/xilinx, samsung, tegra, nxp, ti, qualcomm,
     amlogic and renesas SoC specific drivers"

* tag 'soc-drivers-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (118 commits)
  dt-bindings: interrupt-controller: Convert Amlogic Meson GPIO interrupt controller binding
  MAINTAINERS: add PHY-related files to Amlogic SoC file list
  drivers: meson: secure-pwrc: always enable DMA domain
  tee: optee: Use kmemdup() to replace kmalloc + memcpy
  soc: qcom: geni-se: Do not bother about enable/disable of interrupts in secondary sequencer
  dt-bindings: sram: qcom,imem: document qdu1000
  soc: qcom: icc-bwmon: Fix MSM8998 count unit
  dt-bindings: soc: qcom,rpmh-rsc: Require power-domains
  soc: qcom: socinfo: Add Soc ID for IPQ5300
  dt-bindings: arm: qcom,ids: add SoC ID for IPQ5300
  soc: qcom: Fix a IS_ERR() vs NULL bug in probe
  soc: qcom: socinfo: Add support for new fields in revision 19
  soc: qcom: socinfo: Add support for new fields in revision 18
  dt-bindings: firmware: scm: Add compatible for SDX75
  soc: qcom: mdt_loader: Fix split image detection
  dt-bindings: memory-controllers: drop unneeded quotes
  soc: rockchip: dtpm: use C99 array init syntax
  firmware: tegra: bpmp: Add support for DRAM MRQ GSCs
  soc/tegra: pmc: Use devm_clk_notifier_register()
  soc/tegra: pmc: Simplify debugfs initialization
  ...
parents a9025a5f 356fa497

Documentation/devicetree/bindings/firmware/arm,scmi.yaml

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Original line number Diff line number Diff line
@@ -34,6 +34,10 @@ properties: 
      - description: SCMI compliant firmware with ARM SMC/HVC transport

        items:

          - const: arm,scmi-smc

      - description: SCMI compliant firmware with ARM SMC/HVC transport

                     with shmem address(4KB-page, offset) as parameters

        items:

          - const: arm,scmi-smc-param

      - description: SCMI compliant firmware with SCMI Virtio transport.

                     The virtio transport only supports a single device.

        items:
@@ -299,7 +303,9 @@ else: 
    properties:

      compatible:

        contains:

          const: arm,scmi-smc

          enum:

            - arm,scmi-smc

            - arm,scmi-smc-param

  then:

    required:

      - arm,smc-id

Documentation/devicetree/bindings/firmware/qcom,scm.yaml

+1 −0
Original line number Diff line number Diff line
@@ -51,6 +51,7 @@ properties: 
          - qcom,scm-sdm845

          - qcom,scm-sdx55

          - qcom,scm-sdx65

          - qcom,scm-sdx75

          - qcom,scm-sm6115

          - qcom,scm-sm6125

          - qcom,scm-sm6350

Documentation/devicetree/bindings/interrupt-controller/amlogic,meson-gpio-intc.txt

deleted100644 → 0
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Amlogic meson GPIO interrupt controller



Meson SoCs contains an interrupt controller which is able to watch the SoC

pads and generate an interrupt on edge or level. The controller is essentially

a 256 pads to 8 GIC interrupt multiplexer, with a filter block to select edge

or level and polarity. It does not expose all 256 mux inputs because the

documentation shows that the upper part is not mapped to any pad. The actual

number of interrupt exposed depends on the SoC.



Required properties:



- compatible : must have "amlogic,meson8-gpio-intc" and either

    "amlogic,meson8-gpio-intc" for meson8 SoCs (S802) or

    "amlogic,meson8b-gpio-intc" for meson8b SoCs (S805) or

    "amlogic,meson-gxbb-gpio-intc" for GXBB SoCs (S905) or

    "amlogic,meson-gxl-gpio-intc" for GXL SoCs (S905X, S912)

    "amlogic,meson-axg-gpio-intc" for AXG SoCs (A113D, A113X)

    "amlogic,meson-g12a-gpio-intc" for G12A SoCs (S905D2, S905X2, S905Y2)

    "amlogic,meson-sm1-gpio-intc" for SM1 SoCs (S905D3, S905X3, S905Y3)

    "amlogic,meson-a1-gpio-intc" for A1 SoCs (A113L)

    "amlogic,meson-s4-gpio-intc" for S4 SoCs (S802X2, S905Y4, S805X2G, S905W2)

- reg : Specifies base physical address and size of the registers.

- interrupt-controller : Identifies the node as an interrupt controller.

- #interrupt-cells : Specifies the number of cells needed to encode an

   interrupt source. The value must be 2.

- meson,channel-interrupts: Array with the 8 upstream hwirq numbers. These

   are the hwirqs used on the parent interrupt controller.



Example:



gpio_interrupt: interrupt-controller@9880 {

	compatible = "amlogic,meson-gxbb-gpio-intc",

		     "amlogic,meson-gpio-intc";

	reg = <0x0 0x9880 0x0 0x10>;

	interrupt-controller;

	#interrupt-cells = <2>;

	meson,channel-interrupts = <64 65 66 67 68 69 70 71>;

};

Documentation/devicetree/bindings/interrupt-controller/amlogic,meson-gpio-intc.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/interrupt-controller/amlogic,meson-gpio-intc.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Amlogic Meson GPIO interrupt controller



maintainers:

  - Heiner Kallweit <hkallweit1@gmail.com>



description: |

  Meson SoCs contains an interrupt controller which is able to watch the SoC

  pads and generate an interrupt on edge or level. The controller is essentially

  a 256 pads to 8 or 12 GIC interrupt multiplexer, with a filter block to select

  edge or level and polarity. It does not expose all 256 mux inputs because the

  documentation shows that the upper part is not mapped to any pad. The actual

  number of interrupts exposed depends on the SoC.



allOf:

  - $ref: /schemas/interrupt-controller.yaml#



properties:

  compatible:

    oneOf:

      - const: amlogic,meson-gpio-intc

      - items:

          - enum:

              - amlogic,meson8-gpio-intc

              - amlogic,meson8b-gpio-intc

              - amlogic,meson-gxbb-gpio-intc

              - amlogic,meson-gxl-gpio-intc

              - amlogic,meson-axg-gpio-intc

              - amlogic,meson-g12a-gpio-intc

              - amlogic,meson-sm1-gpio-intc

              - amlogic,meson-a1-gpio-intc

              - amlogic,meson-s4-gpio-intc

          - const: amlogic,meson-gpio-intc



  reg:

    maxItems: 1



  interrupt-controller: true



  "#interrupt-cells":

    const: 2



  amlogic,channel-interrupts:

    description: Array with the upstream hwirq numbers

    minItems: 8

    maxItems: 12

    $ref: /schemas/types.yaml#/definitions/uint32-array



required:

  - compatible

  - reg

  - interrupt-controller

  - "#interrupt-cells"

  - amlogic,channel-interrupts



additionalProperties: false



examples:

  - |

    interrupt-controller@9880 {

      compatible = "amlogic,meson-gxbb-gpio-intc",

                   "amlogic,meson-gpio-intc";

      reg = <0x9880 0x10>;

      interrupt-controller;

      #interrupt-cells = <2>;

      amlogic,channel-interrupts = <64 65 66 67 68 69 70 71>;

    };

Documentation/devicetree/bindings/media/s5p-mfc.txt

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* Samsung Multi Format Codec (MFC)



Multi Format Codec (MFC) is the IP present in Samsung SoCs which

supports high resolution decoding and encoding functionalities.

The MFC device driver is a v4l2 driver which can encode/decode

video raw/elementary streams and has support for all popular

video codecs.



Required properties:

  - compatible : value should be either one among the following

	(a) "samsung,mfc-v5" for MFC v5 present in Exynos4 SoCs

	(b) "samsung,mfc-v6" for MFC v6 present in Exynos5 SoCs

	(c) "samsung,exynos3250-mfc", "samsung,mfc-v7" for MFC v7

	     present in Exynos3250 SoC

	(d) "samsung,mfc-v7" for MFC v7 present in Exynos5420 SoC

	(e) "samsung,mfc-v8" for MFC v8 present in Exynos5800 SoC

	(f) "samsung,exynos5433-mfc" for MFC v8 present in Exynos5433 SoC

	(g) "samsung,mfc-v10" for MFC v10 present in Exynos7880 SoC



  - reg : Physical base address of the IP registers and length of memory

	  mapped region.



  - interrupts : MFC interrupt number to the CPU.

  - clocks : from common clock binding: handle to mfc clock.

  - clock-names : from common clock binding: must contain "mfc",

		  corresponding to entry in the clocks property.



Optional properties:

  - power-domains : power-domain property defined with a phandle

			   to respective power domain.

  - memory-region : from reserved memory binding: phandles to two reserved

	memory regions, first is for "left" mfc memory bus interfaces,

	second if for the "right" mfc memory bus, used when no SYSMMU

	support is available; used only by MFC v5 present in Exynos4 SoCs



Obsolete properties:

  - samsung,mfc-r, samsung,mfc-l : support removed, please use memory-region

	property instead





Example:

SoC specific DT entry:



mfc: codec@13400000 {

	compatible = "samsung,mfc-v5";

	reg = <0x13400000 0x10000>;

	interrupts = <0 94 0>;

	power-domains = <&pd_mfc>;

	clocks = <&clock 273>;

	clock-names = "mfc";

};



Reserved memory specific DT entry for given board (see reserved memory binding

for more information):



reserved-memory {

	#address-cells = <1>;

	#size-cells = <1>;

	ranges;



	mfc_left: region@51000000 {

		compatible = "shared-dma-pool";

		no-map;

		reg = <0x51000000 0x800000>;

	};



	mfc_right: region@43000000 {

		compatible = "shared-dma-pool";

		no-map;

		reg = <0x43000000 0x800000>;

	};

};



Board specific DT entry:



codec@13400000 {

	memory-region = <&mfc_left>, <&mfc_right>;

};