Commit e4bc8829 authored by Suzuki K Poulose's avatar Suzuki K Poulose Committed by Mathieu Poirier
Browse files

coresight: trbe: Allow driver to choose a different alignment 



The TRBE hardware mandates a minimum alignment for the TRBPTR_EL1,
advertised via the TRBIDR_EL1. This is used by the driver to
align the buffer write head. This patch allows the driver to
choose a different alignment from that of the hardware, by
decoupling the alignment tracking. This will be useful for
working around errata.

Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Anshuman Khandual <anshuman.khandual@arm.com>
Cc: Mike Leach <mike.leach@linaro.org>
Cc: Leo Yan <leo.yan@linaro.org>
Reviewed-by: default avatarAnshuman Khandual <anshuman.khandual@arm.com>
Signed-off-by: default avatarSuzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20211019163153.3692640-9-suzuki.poulose@arm.com


Signed-off-by: default avatarMathieu Poirier <mathieu.poirier@linaro.org>
parent 2336a7b2

drivers/hwtracing/coresight/coresight-trbe.c

+15 −3
Original line number Diff line number Diff line
@@ -67,8 +67,18 @@ struct trbe_buf { 
	struct trbe_cpudata *cpudata;

};



/*

 * struct trbe_cpudata: TRBE instance specific data

 * @trbe_flag		- TRBE dirty/access flag support

 * @trbe_hw_align	- Actual TRBE alignment required for TRBPTR_EL1.

 * @trbe_align		- Software alignment used for the TRBPTR_EL1.

 * @cpu			- CPU this TRBE belongs to.

 * @mode		- Mode of current operation. (perf/disabled)

 * @drvdata		- TRBE specific drvdata

 */

struct trbe_cpudata {

	bool trbe_flag;

	u64 trbe_hw_align;

	u64 trbe_align;

	int cpu;

	enum cs_mode mode;
@@ -875,7 +885,7 @@ static ssize_t align_show(struct device *dev, struct device_attribute *attr, cha 
{

	struct trbe_cpudata *cpudata = dev_get_drvdata(dev);



	return sprintf(buf, "%llx\n", cpudata->trbe_align);

	return sprintf(buf, "%llx\n", cpudata->trbe_hw_align);

}

static DEVICE_ATTR_RO(align);
@@ -967,11 +977,13 @@ static void arm_trbe_probe_cpu(void *info) 
		goto cpu_clear;

	}



	cpudata->trbe_align = 1ULL << get_trbe_address_align(trbidr);

	if (cpudata->trbe_align > SZ_2K) {

	cpudata->trbe_hw_align = 1ULL << get_trbe_address_align(trbidr);

	if (cpudata->trbe_hw_align > SZ_2K) {

		pr_err("Unsupported alignment on cpu %d\n", cpu);

		goto cpu_clear;

	}



	cpudata->trbe_align = cpudata->trbe_hw_align;

	cpudata->trbe_flag = get_trbe_flag_update(trbidr);

	cpudata->cpu = cpu;

	cpudata->drvdata = drvdata;