Unverified Commit e4b9c4f6 authored by openeuler-ci-bot's avatar openeuler-ci-bot Committed by Gitee
Browse files

!11194 Fix mainline patchs 

Merge Pull Request from: @ci-robot 
 
PR sync from: Luo Gengkun <luogengkun2@huawei.com>
https://mailweb.openeuler.org/hyperkitty/list/kernel@openeuler.org/message/HKMHROA5KTWLFFBKOZ3TUSJMDB7B6AMH/ 
Breno Leitao (1):
  perf/x86/amd/core: Always clear status for idx

Sandipan Das (1):
  perf/x86/amd/core: Fix overflow reset on hotplug


-- 
2.34.1
 
https://gitee.com/openeuler/kernel/issues/IAMTVA
https://gitee.com/openeuler/kernel/issues/IAMTVO 
 
Link:https://gitee.com/openeuler/kernel/pulls/11194

 

Reviewed-by: default avatarXu Kuohai <xukuohai@huawei.com>
Reviewed-by: default avatarYe Weihua <yeweihua4@huawei.com>
Signed-off-by: default avatarYang Yingliang <yangyingliang@huawei.com>
parents b3492b88 2589ab85

arch/x86/events/amd/core.c

+10 −7
Original line number Diff line number Diff line
@@ -591,8 +591,12 @@ static void amd_pmu_cpu_reset(int cpu) 
	/* Clear enable bits i.e. PerfCntrGlobalCtl.PerfCntrEn */

	wrmsrl(MSR_AMD64_PERF_CNTR_GLOBAL_CTL, 0);



	/* Clear overflow bits i.e. PerfCntrGLobalStatus.PerfCntrOvfl */

	wrmsrl(MSR_AMD64_PERF_CNTR_GLOBAL_STATUS_CLR, amd_pmu_global_cntr_mask);

	/*

	 * Clear freeze and overflow bits i.e. PerfCntrGLobalStatus.LbrFreeze

	 * and PerfCntrGLobalStatus.PerfCntrOvfl

	 */

	wrmsrl(MSR_AMD64_PERF_CNTR_GLOBAL_STATUS_CLR,

	       GLOBAL_STATUS_LBRS_FROZEN | amd_pmu_global_cntr_mask);

}



static int amd_pmu_cpu_prepare(int cpu)
@@ -619,6 +623,7 @@ static void amd_pmu_cpu_starting(int cpu) 
	int i, nb_id;



	cpuc->perf_ctr_virt_mask = AMD64_EVENTSEL_HOSTONLY;

	amd_pmu_cpu_reset(cpu);



	if (!x86_pmu.amd_nb_constraints)

		return;
@@ -642,13 +647,14 @@ static void amd_pmu_cpu_starting(int cpu) 
	cpuc->amd_nb->refcnt++;



	amd_brs_reset();

	amd_pmu_cpu_reset(cpu);

}



static void amd_pmu_cpu_dead(int cpu)

{

	struct cpu_hw_events *cpuhw;



	amd_pmu_cpu_reset(cpu);



	if (!x86_pmu.amd_nb_constraints)

		return;
@@ -662,8 +668,6 @@ static void amd_pmu_cpu_dead(int cpu) 


		cpuhw->amd_nb = NULL;

	}



	amd_pmu_cpu_reset(cpu);

}



static inline void amd_pmu_set_global_ctl(u64 ctl)
@@ -956,6 +960,7 @@ static int amd_pmu_v2_handle_irq(struct pt_regs *regs) 


		/* Event overflow */

		handled++;

		status &= ~mask;

		perf_sample_data_init(&data, 0, hwc->last_period);



		if (!x86_perf_event_set_period(event))
@@ -963,8 +968,6 @@ static int amd_pmu_v2_handle_irq(struct pt_regs *regs) 


		if (perf_event_overflow(event, &data, regs))

			x86_pmu_stop(event, 0);



		status &= ~mask;

	}



	/*