Commit e4ae4c8e authored by Thomas Gleixner's avatar Thomas Gleixner
Browse files

Merge branch 'irq/core' into x86/apic 

Pick up the dependencies for the vector management rework series.
parents ae41a2a4 ec0f7cd2

arch/x86/include/asm/irqdomain.h

+2 −2
Original line number Diff line number Diff line
@@ -41,8 +41,8 @@ extern int mp_irqdomain_alloc(struct irq_domain *domain, unsigned int virq, 
			      unsigned int nr_irqs, void *arg);

extern void mp_irqdomain_free(struct irq_domain *domain, unsigned int virq,

			      unsigned int nr_irqs);

extern void mp_irqdomain_activate(struct irq_domain *domain,

				  struct irq_data *irq_data);

extern int mp_irqdomain_activate(struct irq_domain *domain,

				 struct irq_data *irq_data, bool early);

extern void mp_irqdomain_deactivate(struct irq_domain *domain,

				    struct irq_data *irq_data);

extern int mp_irqdomain_ioapic_idx(struct irq_domain *domain);

arch/x86/kernel/apic/htirq.c

+3 −2
Original line number Diff line number Diff line
@@ -112,8 +112,8 @@ static void htirq_domain_free(struct irq_domain *domain, unsigned int virq, 
	irq_domain_free_irqs_top(domain, virq, nr_irqs);

}



static void htirq_domain_activate(struct irq_domain *domain,

				  struct irq_data *irq_data)

static int htirq_domain_activate(struct irq_domain *domain,

				 struct irq_data *irq_data, bool early)

{

	struct ht_irq_msg msg;

	struct irq_cfg *cfg = irqd_cfg(irq_data);
@@ -132,6 +132,7 @@ static void htirq_domain_activate(struct irq_domain *domain, 
			HT_IRQ_LOW_MT_ARBITRATED) |

		HT_IRQ_LOW_IRQ_MASKED;

	write_ht_irq_msg(irq_data->irq, &msg);

	return 0;

}



static void htirq_domain_deactivate(struct irq_domain *domain,

arch/x86/kernel/apic/io_apic.c

+5 −4
Original line number Diff line number Diff line
@@ -2137,7 +2137,7 @@ static inline void __init check_timer(void) 
				unmask_ioapic_irq(irq_get_irq_data(0));

		}

		irq_domain_deactivate_irq(irq_data);

		irq_domain_activate_irq(irq_data);

		irq_domain_activate_irq(irq_data, false);

		if (timer_irq_works()) {

			if (disable_timer_pin_1 > 0)

				clear_IO_APIC_pin(0, pin1);
@@ -2159,7 +2159,7 @@ static inline void __init check_timer(void) 
		 */

		replace_pin_at_irq_node(data, node, apic1, pin1, apic2, pin2);

		irq_domain_deactivate_irq(irq_data);

		irq_domain_activate_irq(irq_data);

		irq_domain_activate_irq(irq_data, false);

		legacy_pic->unmask(0);

		if (timer_irq_works()) {

			apic_printk(APIC_QUIET, KERN_INFO "....... works.\n");
@@ -3018,8 +3018,8 @@ void mp_irqdomain_free(struct irq_domain *domain, unsigned int virq, 
	irq_domain_free_irqs_top(domain, virq, nr_irqs);

}



void mp_irqdomain_activate(struct irq_domain *domain,

			   struct irq_data *irq_data)

int mp_irqdomain_activate(struct irq_domain *domain,

			  struct irq_data *irq_data, bool early)

{

	unsigned long flags;

	struct irq_pin_list *entry;
@@ -3029,6 +3029,7 @@ void mp_irqdomain_activate(struct irq_domain *domain, 
	for_each_irq_pin(entry, data->irq_2_pin)

		__ioapic_write_entry(entry->apic, entry->pin, data->entry);

	raw_spin_unlock_irqrestore(&ioapic_lock, flags);

	return 0;

}



void mp_irqdomain_deactivate(struct irq_domain *domain,

arch/x86/platform/uv/uv_irq.c

+3 −2
Original line number Diff line number Diff line
@@ -127,10 +127,11 @@ static void uv_domain_free(struct irq_domain *domain, unsigned int virq, 
 * Re-target the irq to the specified CPU and enable the specified MMR located

 * on the specified blade to allow the sending of MSIs to the specified CPU.

 */

static void uv_domain_activate(struct irq_domain *domain,

			       struct irq_data *irq_data)

static int uv_domain_activate(struct irq_domain *domain,

			      struct irq_data *irq_data, bool early)

{

	uv_program_mmr(irqd_cfg(irq_data), irq_data->chip_data);

	return 0;

}



/*

drivers/gpio/gpio-xgene-sb.c

+5 −3
Original line number Diff line number Diff line
@@ -140,8 +140,9 @@ static int xgene_gpio_sb_to_irq(struct gpio_chip *gc, u32 gpio) 
	return irq_create_fwspec_mapping(&fwspec);

}



static void xgene_gpio_sb_domain_activate(struct irq_domain *d,

		struct irq_data *irq_data)

static int xgene_gpio_sb_domain_activate(struct irq_domain *d,

					 struct irq_data *irq_data,

					 bool early)

{

	struct xgene_gpio_sb *priv = d->host_data;

	u32 gpio = HWIRQ_TO_GPIO(priv, irq_data->hwirq);
@@ -150,11 +151,12 @@ static void xgene_gpio_sb_domain_activate(struct irq_domain *d, 
		dev_err(priv->gc.parent,

		"Unable to configure XGene GPIO standby pin %d as IRQ\n",

				gpio);

		return;

		return -ENOSPC;

	}



	xgene_gpio_set_bit(&priv->gc, priv->regs + MPA_GPIO_SEL_LO,

			gpio * 2, 1);

	return 0;

}



static void xgene_gpio_sb_domain_deactivate(struct irq_domain *d,