Commit e4a7e67a authored by Frank Li's avatar Frank Li Committed by Marc Zyngier
Browse files

irqchip/imx-mu-msi: Fix wrong register offset for 8ulp 



Offset 0x124 should be for IMX_MU_TSR, not IMX_MU_GSR.

Fixes: 70afdab9 ("irqchip: Add IMX MU MSI controller driver")
Reported-by: default avatarColin King <colin.i.king@gmail.com>
Signed-off-by: default avatarFrank Li <Frank.Li@nxp.com>
[maz: updated commit message, tags]
Signed-off-by: default avatarMarc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20221004202414.216577-1-Frank.Li@nxp.com
parent 1b00adce

drivers/irqchip/irq-imx-mu-msi.c

+1 −1
Original line number Diff line number Diff line
@@ -292,7 +292,7 @@ static const struct imx_mu_dcfg imx_mu_cfg_imx8ulp = { 
	.xSR    = {

			[IMX_MU_SR]  = 0xC,

			[IMX_MU_GSR] = 0x118,

			[IMX_MU_GSR] = 0x124,

			[IMX_MU_TSR] = 0x124,

			[IMX_MU_RSR] = 0x12C,

		  },

	.xCR    = {