Commit e46a1a99 authored by Geert Uytterhoeven's avatar Geert Uytterhoeven
Browse files

clk: renesas: r8a779g0: Add EtherAVB clocks 



Add the module clocks used by the Ethernet AVB (EtherAVB-IF) blocks on
the Renesas R-Car V4H (R8A779G0) SoC.

Based on a larger patch in the BSP by Kazuya Mizuguchi.

Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/e9382b0d9acc84acc2357a6921a1459f3a32240e.1662714852.git.geert+renesas@glider.be
parent 36ff3660

drivers/clk/renesas/r8a779g0-cpg-mssr.c

+3 −0
Original line number Diff line number Diff line
@@ -150,6 +150,9 @@ static const struct cpg_core_clk r8a779g0_core_clks[] __initconst = { 
};



static const struct mssr_mod_clk r8a779g0_mod_clks[] __initconst = {

	DEF_MOD("avb0",		211,	R8A779G0_CLK_S0D4_HSC),

	DEF_MOD("avb1",		212,	R8A779G0_CLK_S0D4_HSC),

	DEF_MOD("avb2",		213,	R8A779G0_CLK_S0D4_HSC),

	DEF_MOD("hscif0",	514,	R8A779G0_CLK_S0D3_PER),

	DEF_MOD("hscif1",	515,	R8A779G0_CLK_S0D3_PER),

	DEF_MOD("hscif2",	516,	R8A779G0_CLK_S0D3_PER),