Commit e4421721 authored by Brian Norris's avatar Brian Norris Committed by Chanwoo Choi
Browse files

PM / devfreq: rk3399_dmc: Support new disable-freq properties 



Implement the newly-defined properties to allow disabling certain
power-saving-at-idle features at higher frequencies.

This is a rewritten version of work by Lin Huang <hl@rock-chips.com>.

Signed-off-by: default avatarBrian Norris <briannorris@chromium.org>
Signed-off-by: default avatarChanwoo Choi <cw00.choi@samsung.com>
parent a5ca1854

drivers/devfreq/rk3399_dmc.c

+47 −4
Original line number Diff line number Diff line
@@ -55,6 +55,12 @@ struct rk3399_dmcfreq { 
	unsigned int ddr3_odt_dis_freq;

	unsigned int lpddr3_odt_dis_freq;

	unsigned int lpddr4_odt_dis_freq;



	unsigned int pd_idle_dis_freq;

	unsigned int sr_idle_dis_freq;

	unsigned int sr_mc_gate_idle_dis_freq;

	unsigned int srpd_lite_idle_dis_freq;

	unsigned int standby_idle_dis_freq;

};



static int rk3399_dmcfreq_target(struct device *dev, unsigned long *freq,
@@ -81,8 +87,25 @@ static int rk3399_dmcfreq_target(struct device *dev, unsigned long *freq, 
	mutex_lock(&dmcfreq->lock);



	if (dmcfreq->regmap_pmu) {

		unsigned int odt_pd_arg0 = dmcfreq->odt_pd_arg0;

		unsigned int odt_pd_arg1 = dmcfreq->odt_pd_arg1;

		unsigned int odt_pd_arg2 = 0;



		if (target_rate >= dmcfreq->sr_idle_dis_freq)

			odt_pd_arg0 &= ~RK3399_SET_ODT_PD_0_SR_IDLE;



		if (target_rate >= dmcfreq->sr_mc_gate_idle_dis_freq)

			odt_pd_arg0 &= ~RK3399_SET_ODT_PD_0_SR_MC_GATE_IDLE;



		if (target_rate >= dmcfreq->standby_idle_dis_freq)

			odt_pd_arg0 &= ~RK3399_SET_ODT_PD_0_STANDBY_IDLE;



		if (target_rate >= dmcfreq->pd_idle_dis_freq)

			odt_pd_arg1 &= ~RK3399_SET_ODT_PD_1_PD_IDLE;



		if (target_rate >= dmcfreq->srpd_lite_idle_dis_freq)

			odt_pd_arg1 &= ~RK3399_SET_ODT_PD_1_SRPD_LITE_IDLE;



		if (target_rate >= dmcfreq->odt_dis_freq)

			odt_pd_arg2 |= RK3399_SET_ODT_PD_2_ODT_ENABLE;
@@ -91,10 +114,9 @@ static int rk3399_dmcfreq_target(struct device *dev, unsigned long *freq, 
		 * (power-down) timings and to enable or disable the

		 * ODT (on-die termination) resistors.

		 */

		arm_smccc_smc(ROCKCHIP_SIP_DRAM_FREQ, dmcfreq->odt_pd_arg0,

			      dmcfreq->odt_pd_arg1,

			      ROCKCHIP_SIP_CONFIG_DRAM_SET_ODT_PD,

			      odt_pd_arg2, 0, 0, 0, &res);

		arm_smccc_smc(ROCKCHIP_SIP_DRAM_FREQ, odt_pd_arg0, odt_pd_arg1,

			      ROCKCHIP_SIP_CONFIG_DRAM_SET_ODT_PD, odt_pd_arg2,

			      0, 0, 0, &res);

	}



	/*
@@ -230,6 +252,16 @@ static int rk3399_dmcfreq_of_props(struct rk3399_dmcfreq *data, 
{

	int ret = 0;



	/*

	 * These are all optional, and serve as minimum bounds. Give them large

	 * (i.e., never "disabled") values if the DT doesn't specify one.

	 */

	data->pd_idle_dis_freq =

		data->sr_idle_dis_freq =

		data->sr_mc_gate_idle_dis_freq =

		data->srpd_lite_idle_dis_freq =

		data->standby_idle_dis_freq = UINT_MAX;



	ret |= of_property_read_u32(np, "rockchip,pd_idle",

				    &data->pd_idle);

	ret |= of_property_read_u32(np, "rockchip,sr_idle",
@@ -247,6 +279,17 @@ static int rk3399_dmcfreq_of_props(struct rk3399_dmcfreq *data, 
	ret |= of_property_read_u32(np, "rockchip,lpddr4_odt_dis_freq",

				    &data->lpddr4_odt_dis_freq);



	ret |= of_property_read_u32(np, "rockchip,pd-idle-dis-freq-hz",

				    &data->pd_idle_dis_freq);

	ret |= of_property_read_u32(np, "rockchip,sr-idle-dis-freq-hz",

				    &data->sr_idle_dis_freq);

	ret |= of_property_read_u32(np, "rockchip,sr-mc-gate-idle-dis-freq-hz",

				    &data->sr_mc_gate_idle_dis_freq);

	ret |= of_property_read_u32(np, "rockchip,srpd-lite-idle-dis-freq-hz",

				    &data->srpd_lite_idle_dis_freq);

	ret |= of_property_read_u32(np, "rockchip,standby-idle-dis-freq-hz",

				    &data->standby_idle_dis_freq);



	return ret;

}