Commit e37fef79 authored by Daniel Vetter's avatar Daniel Vetter
Browse files

Merge tag 'drm-intel-fixes-2023-03-23' of... 

Merge tag 'drm-intel-fixes-2023-03-23' of git://anongit.freedesktop.org/drm/drm-intel

 into drm-fixes

drm/i915 fixes for v6.3-rc4:
- Fix an MTL workaround
- Fix fbdev obj locking before vma pin
- Fix state inheritance tracking in initial commit
- Fix missing GuC error capture codes
- Fix missing debug object activation
- Fix uc init late order relative to probe error injection
- Fix perf limit reasons formatting
- Fix vblank timestamp update on seamless M/N changes

Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
From: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/878rfn7njw.fsf@intel.com
parents 9b5dbf6b 22aa20e4

drivers/gpu/drm/i915/display/intel_crtc.c

+8 −0
Original line number Diff line number Diff line
@@ -683,6 +683,14 @@ void intel_pipe_update_end(struct intel_crtc_state *new_crtc_state) 
	 */

	intel_vrr_send_push(new_crtc_state);



	/*

	 * Seamless M/N update may need to update frame timings.

	 *

	 * FIXME Should be synchronized with the start of vblank somehow...

	 */

	if (new_crtc_state->seamless_m_n && intel_crtc_needs_fastset(new_crtc_state))

		intel_crtc_update_active_timings(new_crtc_state);



	local_irq_enable();



	if (intel_vgpu_active(dev_priv))

drivers/gpu/drm/i915/display/intel_display.c

+1 −0
Original line number Diff line number Diff line
@@ -5145,6 +5145,7 @@ intel_crtc_prepare_cleared_state(struct intel_atomic_state *state, 
	 * only fields that are know to not cause problems are preserved. */



	saved_state->uapi = crtc_state->uapi;

	saved_state->inherited = crtc_state->inherited;

	saved_state->scaler_state = crtc_state->scaler_state;

	saved_state->shared_dpll = crtc_state->shared_dpll;

	saved_state->dpll_hw_state = crtc_state->dpll_hw_state;

drivers/gpu/drm/i915/display/intel_dmc.c

+21 −5
Original line number Diff line number Diff line
@@ -384,15 +384,12 @@ static void disable_all_event_handlers(struct drm_i915_private *i915) 
	}

}



static void pipedmc_clock_gating_wa(struct drm_i915_private *i915, bool enable)

static void adlp_pipedmc_clock_gating_wa(struct drm_i915_private *i915, bool enable)

{

	enum pipe pipe;



	if (DISPLAY_VER(i915) < 13)

		return;



	/*

	 * Wa_16015201720:adl-p,dg2, mtl

	 * Wa_16015201720:adl-p,dg2

	 * The WA requires clock gating to be disabled all the time

	 * for pipe A and B.

	 * For pipe C and D clock gating needs to be disabled only
@@ -408,6 +405,25 @@ static void pipedmc_clock_gating_wa(struct drm_i915_private *i915, bool enable) 
				     PIPEDMC_GATING_DIS, 0);

}



static void mtl_pipedmc_clock_gating_wa(struct drm_i915_private *i915)

{

	/*

	 * Wa_16015201720

	 * The WA requires clock gating to be disabled all the time

	 * for pipe A and B.

	 */

	intel_de_rmw(i915, GEN9_CLKGATE_DIS_0, 0,

		     MTL_PIPEDMC_GATING_DIS_A | MTL_PIPEDMC_GATING_DIS_B);

}



static void pipedmc_clock_gating_wa(struct drm_i915_private *i915, bool enable)

{

	if (DISPLAY_VER(i915) >= 14 && enable)

		mtl_pipedmc_clock_gating_wa(i915);

	else if (DISPLAY_VER(i915) == 13)

		adlp_pipedmc_clock_gating_wa(i915, enable);

}



void intel_dmc_enable_pipe(struct drm_i915_private *i915, enum pipe pipe)

{

	if (!has_dmc_id_fw(i915, PIPE_TO_DMC_ID(pipe)))

drivers/gpu/drm/i915/display/intel_fbdev.c

+18 −6
Original line number Diff line number Diff line
@@ -210,6 +210,7 @@ static int intelfb_create(struct drm_fb_helper *helper, 
	bool prealloc = false;

	void __iomem *vaddr;

	struct drm_i915_gem_object *obj;

	struct i915_gem_ww_ctx ww;

	int ret;



	mutex_lock(&ifbdev->hpd_lock);
@@ -283,13 +284,24 @@ static int intelfb_create(struct drm_fb_helper *helper, 
		info->fix.smem_len = vma->size;

	}



	for_i915_gem_ww(&ww, ret, false) {

		ret = i915_gem_object_lock(vma->obj, &ww);



		if (ret)

			continue;



		vaddr = i915_vma_pin_iomap(vma);

		if (IS_ERR(vaddr)) {

			drm_err(&dev_priv->drm,

				"Failed to remap framebuffer into virtual memory (%pe)\n", vaddr);

			ret = PTR_ERR(vaddr);

		goto out_unpin;

			continue;

		}

	}



	if (ret)

		goto out_unpin;



	info->screen_base = vaddr;

	info->screen_size = vma->size;

drivers/gpu/drm/i915/gt/intel_gt.c

+2 −2
Original line number Diff line number Diff line
@@ -737,12 +737,12 @@ int intel_gt_init(struct intel_gt *gt) 
	if (err)

		goto err_gt;



	intel_uc_init_late(&gt->uc);



	err = i915_inject_probe_error(gt->i915, -EIO);

	if (err)

		goto err_gt;



	intel_uc_init_late(&gt->uc);



	intel_migrate_init(&gt->migrate, gt);



	goto out_fw;