Loading arch/mips/txx9/Kconfig +3 −0 Original line number Diff line number Diff line Loading @@ -30,6 +30,7 @@ config SOC_TX3927 select IRQ_TXX9 select SWAP_IO_SPACE select SYS_HAS_CPU_TX39XX select SYS_HAS_EARLY_PRINTK select SYS_SUPPORTS_32BIT_KERNEL select SYS_SUPPORTS_LITTLE_ENDIAN select SYS_SUPPORTS_BIG_ENDIAN Loading @@ -49,6 +50,7 @@ config SOC_TX4927 select PCI_TX4927 select SWAP_IO_SPACE select SYS_HAS_CPU_TX49XX select SYS_HAS_EARLY_PRINTK select SYS_SUPPORTS_32BIT_KERNEL select SYS_SUPPORTS_64BIT_KERNEL select SYS_SUPPORTS_LITTLE_ENDIAN Loading @@ -70,6 +72,7 @@ config SOC_TX4938 select PCI_TX4927 select SWAP_IO_SPACE select SYS_HAS_CPU_TX49XX select SYS_HAS_EARLY_PRINTK select SYS_SUPPORTS_32BIT_KERNEL select SYS_SUPPORTS_64BIT_KERNEL select SYS_SUPPORTS_LITTLE_ENDIAN Loading arch/mips/txx9/generic/setup.c +31 −0 Original line number Diff line number Diff line Loading @@ -271,6 +271,37 @@ void __init txx9_sio_init(unsigned long baseaddr, int irq, #endif /* CONFIG_SERIAL_TXX9 */ } #ifdef CONFIG_EARLY_PRINTK static void __init null_prom_putchar(char c) { } void (*txx9_prom_putchar)(char c) __initdata = null_prom_putchar; void __init prom_putchar(char c) { txx9_prom_putchar(c); } static void __iomem *early_txx9_sio_port; static void __init early_txx9_sio_putchar(char c) { #define TXX9_SICISR 0x0c #define TXX9_SITFIFO 0x1c #define TXX9_SICISR_TXALS 0x00000002 while (!(__raw_readl(early_txx9_sio_port + TXX9_SICISR) & TXX9_SICISR_TXALS)) ; __raw_writel(c, early_txx9_sio_port + TXX9_SITFIFO); } void __init txx9_sio_putchar_init(unsigned long baseaddr) { early_txx9_sio_port = ioremap(baseaddr, 0x24); txx9_prom_putchar = early_txx9_sio_putchar; } #endif /* CONFIG_EARLY_PRINTK */ /* wrappers */ void __init plat_mem_setup(void) { Loading arch/mips/txx9/jmr3927/prom.c +1 −16 Original line number Diff line number Diff line Loading @@ -41,22 +41,6 @@ #include <asm/txx9/generic.h> #include <asm/txx9/jmr3927.h> #define TIMEOUT 0xffffff void prom_putchar(char c) { int i = 0; do { i++; if (i>TIMEOUT) break; } while (!(tx3927_sioptr(1)->cisr & TXx927_SICISR_TXALS)); tx3927_sioptr(1)->tfifo = c; return; } void __init jmr3927_prom_init(void) { /* CCFG */ Loading @@ -65,4 +49,5 @@ void __init jmr3927_prom_init(void) prom_init_cmdline(); add_memory_region(0, JMR3927_SDRAM_SIZE, BOOT_MEM_RAM); txx9_sio_putchar_init(TX3927_SIO_REG(1)); } arch/mips/txx9/rbtx4927/prom.c +1 −0 Original line number Diff line number Diff line Loading @@ -38,4 +38,5 @@ void __init rbtx4927_prom_init(void) { prom_init_cmdline(); add_memory_region(0, tx4927_get_mem_size(), BOOT_MEM_RAM); txx9_sio_putchar_init(TX4927_SIO_REG(0) & 0xfffffffffULL); } arch/mips/txx9/rbtx4938/prom.c +1 −0 Original line number Diff line number Diff line Loading @@ -22,4 +22,5 @@ void __init rbtx4938_prom_init(void) prom_init_cmdline(); #endif add_memory_region(0, tx4938_get_mem_size(), BOOT_MEM_RAM); txx9_sio_putchar_init(TX4938_SIO_REG(0) & 0xfffffffffULL); } Loading
arch/mips/txx9/Kconfig +3 −0 Original line number Diff line number Diff line Loading @@ -30,6 +30,7 @@ config SOC_TX3927 select IRQ_TXX9 select SWAP_IO_SPACE select SYS_HAS_CPU_TX39XX select SYS_HAS_EARLY_PRINTK select SYS_SUPPORTS_32BIT_KERNEL select SYS_SUPPORTS_LITTLE_ENDIAN select SYS_SUPPORTS_BIG_ENDIAN Loading @@ -49,6 +50,7 @@ config SOC_TX4927 select PCI_TX4927 select SWAP_IO_SPACE select SYS_HAS_CPU_TX49XX select SYS_HAS_EARLY_PRINTK select SYS_SUPPORTS_32BIT_KERNEL select SYS_SUPPORTS_64BIT_KERNEL select SYS_SUPPORTS_LITTLE_ENDIAN Loading @@ -70,6 +72,7 @@ config SOC_TX4938 select PCI_TX4927 select SWAP_IO_SPACE select SYS_HAS_CPU_TX49XX select SYS_HAS_EARLY_PRINTK select SYS_SUPPORTS_32BIT_KERNEL select SYS_SUPPORTS_64BIT_KERNEL select SYS_SUPPORTS_LITTLE_ENDIAN Loading
arch/mips/txx9/generic/setup.c +31 −0 Original line number Diff line number Diff line Loading @@ -271,6 +271,37 @@ void __init txx9_sio_init(unsigned long baseaddr, int irq, #endif /* CONFIG_SERIAL_TXX9 */ } #ifdef CONFIG_EARLY_PRINTK static void __init null_prom_putchar(char c) { } void (*txx9_prom_putchar)(char c) __initdata = null_prom_putchar; void __init prom_putchar(char c) { txx9_prom_putchar(c); } static void __iomem *early_txx9_sio_port; static void __init early_txx9_sio_putchar(char c) { #define TXX9_SICISR 0x0c #define TXX9_SITFIFO 0x1c #define TXX9_SICISR_TXALS 0x00000002 while (!(__raw_readl(early_txx9_sio_port + TXX9_SICISR) & TXX9_SICISR_TXALS)) ; __raw_writel(c, early_txx9_sio_port + TXX9_SITFIFO); } void __init txx9_sio_putchar_init(unsigned long baseaddr) { early_txx9_sio_port = ioremap(baseaddr, 0x24); txx9_prom_putchar = early_txx9_sio_putchar; } #endif /* CONFIG_EARLY_PRINTK */ /* wrappers */ void __init plat_mem_setup(void) { Loading
arch/mips/txx9/jmr3927/prom.c +1 −16 Original line number Diff line number Diff line Loading @@ -41,22 +41,6 @@ #include <asm/txx9/generic.h> #include <asm/txx9/jmr3927.h> #define TIMEOUT 0xffffff void prom_putchar(char c) { int i = 0; do { i++; if (i>TIMEOUT) break; } while (!(tx3927_sioptr(1)->cisr & TXx927_SICISR_TXALS)); tx3927_sioptr(1)->tfifo = c; return; } void __init jmr3927_prom_init(void) { /* CCFG */ Loading @@ -65,4 +49,5 @@ void __init jmr3927_prom_init(void) prom_init_cmdline(); add_memory_region(0, JMR3927_SDRAM_SIZE, BOOT_MEM_RAM); txx9_sio_putchar_init(TX3927_SIO_REG(1)); }
arch/mips/txx9/rbtx4927/prom.c +1 −0 Original line number Diff line number Diff line Loading @@ -38,4 +38,5 @@ void __init rbtx4927_prom_init(void) { prom_init_cmdline(); add_memory_region(0, tx4927_get_mem_size(), BOOT_MEM_RAM); txx9_sio_putchar_init(TX4927_SIO_REG(0) & 0xfffffffffULL); }
arch/mips/txx9/rbtx4938/prom.c +1 −0 Original line number Diff line number Diff line Loading @@ -22,4 +22,5 @@ void __init rbtx4938_prom_init(void) prom_init_cmdline(); #endif add_memory_region(0, tx4938_get_mem_size(), BOOT_MEM_RAM); txx9_sio_putchar_init(TX4938_SIO_REG(0) & 0xfffffffffULL); }