Unverified Commit e2edd1b6 authored by Miquel Raynal's avatar Miquel Raynal Committed by Mark Brown
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spi: dt-bindings: Describe stacked/parallel memories modes 



Describe two new memories modes:
- A stacked mode when the bus is common but the address space extended
  with an additinals wires.
- A parallel mode with parallel busses accessing parallel flashes where
  the data is spread.

Signed-off-by: default avatarMiquel Raynal <miquel.raynal@bootlin.com>
Acked-by: default avatarPratyush Yadav <p.yadav@ti.com>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220126112608.955728-3-miquel.raynal@bootlin.com


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent b252ada2

Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml

+25 −0
Original line number Diff line number Diff line
@@ -82,6 +82,31 @@ properties: 
    description:

      Delay, in microseconds, after a write transfer.



  stacked-memories:

    description: Several SPI memories can be wired in stacked mode.

      This basically means that either a device features several chip

      selects, or that different devices must be seen as a single

      bigger chip. This basically doubles (or more) the total address

      space with only a single additional wire, while still needing

      to repeat the commands when crossing a chip boundary. The size of

      each chip should be provided as members of the array.

    $ref: /schemas/types.yaml#/definitions/uint64-array

    minItems: 2

    maxItems: 4



  parallel-memories:

    description: Several SPI memories can be wired in parallel mode.

      The devices are physically on a different buses but will always

      act synchronously as each data word is spread across the

      different memories (eg. even bits are stored in one memory, odd

      bits in the other). This basically doubles the address space and

      the throughput while greatly complexifying the wiring because as

      many busses as devices must be wired. The size of each chip should

      be provided as members of the array.

    $ref: /schemas/types.yaml#/definitions/uint64-array

    minItems: 2

    maxItems: 4



# The controller specific properties go here.

allOf:

  - $ref: cdns,qspi-nor-peripheral-props.yaml#