Commit e2c1b0ff authored by Saravana Kannan's avatar Saravana Kannan Committed by Shawn Guo
Browse files

ARM: imx: avic: Convert to using IRQCHIP_DECLARE



Using IRQCHIP_DECLARE lets fw_devlink know that it should not wait for
these interrupt controllers to be populated as struct devices. Without
this change, fw_devlink=on will make the consumers of these interrupt
controllers wait for the struct device to be added and thereby block the
consumers' probes forever. Converting to IRQCHIP_DECLARE addresses boot
issues on imx25 with fw_devlink=on that were reported by Martin.

This also removes a lot of boilerplate code.

Fixes: e5904747 ("driver core: Set fw_devlink=on by default")
Reported-by: default avatarMartin Kaiser <martin@kaiser.cx>
Signed-off-by: default avatarSaravana Kannan <saravanak@google.com>
Tested-by: default avatarMartin Kaiser <martin@kaiser.cx>
Reviewed-by: default avatarFabio Estevam <festevam@gmail.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent a38fd874
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+15 −1
Original line number Original line Diff line number Diff line
@@ -7,6 +7,7 @@
#include <linux/module.h>
#include <linux/module.h>
#include <linux/irq.h>
#include <linux/irq.h>
#include <linux/irqdomain.h>
#include <linux/irqdomain.h>
#include <linux/irqchip.h>
#include <linux/io.h>
#include <linux/io.h>
#include <linux/of.h>
#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/of_address.h>
@@ -162,7 +163,7 @@ static void __exception_irq_entry avic_handle_irq(struct pt_regs *regs)
 * interrupts. It registers the interrupt enable and disable functions
 * interrupts. It registers the interrupt enable and disable functions
 * to the kernel for each interrupt source.
 * to the kernel for each interrupt source.
 */
 */
void __init mxc_init_irq(void __iomem *irqbase)
static void __init mxc_init_irq(void __iomem *irqbase)
{
{
	struct device_node *np;
	struct device_node *np;
	int irq_base;
	int irq_base;
@@ -220,3 +221,16 @@ void __init mxc_init_irq(void __iomem *irqbase)


	printk(KERN_INFO "MXC IRQ initialized\n");
	printk(KERN_INFO "MXC IRQ initialized\n");
}
}

static int __init imx_avic_init(struct device_node *node,
			       struct device_node *parent)
{
	void __iomem *avic_base;

	avic_base = of_iomap(node, 0);
	BUG_ON(!avic_base);
	mxc_init_irq(avic_base);
	return 0;
}

IRQCHIP_DECLARE(imx_avic, "fsl,avic", imx_avic_init);
+0 −1
Original line number Original line Diff line number Diff line
@@ -22,7 +22,6 @@ void mx35_map_io(void);
void imx21_init_early(void);
void imx21_init_early(void);
void imx31_init_early(void);
void imx31_init_early(void);
void imx35_init_early(void);
void imx35_init_early(void);
void mxc_init_irq(void __iomem *);
void mx31_init_irq(void);
void mx31_init_irq(void);
void mx35_init_irq(void);
void mx35_init_irq(void);
void mxc_set_cpu_type(unsigned int type);
void mxc_set_cpu_type(unsigned int type);
+0 −11
Original line number Original line Diff line number Diff line
@@ -17,16 +17,6 @@ static void __init imx1_init_early(void)
	mxc_set_cpu_type(MXC_CPU_MX1);
	mxc_set_cpu_type(MXC_CPU_MX1);
}
}


static void __init imx1_init_irq(void)
{
	void __iomem *avic_addr;

	avic_addr = ioremap(MX1_AVIC_ADDR, SZ_4K);
	WARN_ON(!avic_addr);

	mxc_init_irq(avic_addr);
}

static const char * const imx1_dt_board_compat[] __initconst = {
static const char * const imx1_dt_board_compat[] __initconst = {
	"fsl,imx1",
	"fsl,imx1",
	NULL
	NULL
@@ -34,7 +24,6 @@ static const char * const imx1_dt_board_compat[] __initconst = {


DT_MACHINE_START(IMX1_DT, "Freescale i.MX1 (Device Tree Support)")
DT_MACHINE_START(IMX1_DT, "Freescale i.MX1 (Device Tree Support)")
	.init_early	= imx1_init_early,
	.init_early	= imx1_init_early,
	.init_irq	= imx1_init_irq,
	.dt_compat	= imx1_dt_board_compat,
	.dt_compat	= imx1_dt_board_compat,
	.restart	= mxc_restart,
	.restart	= mxc_restart,
MACHINE_END
MACHINE_END
+0 −12
Original line number Original line Diff line number Diff line
@@ -22,17 +22,6 @@ static void __init imx25_dt_init(void)
	imx_aips_allow_unprivileged_access("fsl,imx25-aips");
	imx_aips_allow_unprivileged_access("fsl,imx25-aips");
}
}


static void __init mx25_init_irq(void)
{
	struct device_node *np;
	void __iomem *avic_base;

	np = of_find_compatible_node(NULL, NULL, "fsl,avic");
	avic_base = of_iomap(np, 0);
	BUG_ON(!avic_base);
	mxc_init_irq(avic_base);
}

static const char * const imx25_dt_board_compat[] __initconst = {
static const char * const imx25_dt_board_compat[] __initconst = {
	"fsl,imx25",
	"fsl,imx25",
	NULL
	NULL
@@ -42,6 +31,5 @@ DT_MACHINE_START(IMX25_DT, "Freescale i.MX25 (Device Tree Support)")
	.init_early	= imx25_init_early,
	.init_early	= imx25_init_early,
	.init_machine	= imx25_dt_init,
	.init_machine	= imx25_dt_init,
	.init_late      = imx25_pm_init,
	.init_late      = imx25_pm_init,
	.init_irq	= mx25_init_irq,
	.dt_compat	= imx25_dt_board_compat,
	.dt_compat	= imx25_dt_board_compat,
MACHINE_END
MACHINE_END
+0 −12
Original line number Original line Diff line number Diff line
@@ -56,17 +56,6 @@ static void __init imx27_init_early(void)
	mxc_set_cpu_type(MXC_CPU_MX27);
	mxc_set_cpu_type(MXC_CPU_MX27);
}
}


static void __init mx27_init_irq(void)
{
	void __iomem *avic_base;
	struct device_node *np;

	np = of_find_compatible_node(NULL, NULL, "fsl,avic");
	avic_base = of_iomap(np, 0);
	BUG_ON(!avic_base);
	mxc_init_irq(avic_base);
}

static const char * const imx27_dt_board_compat[] __initconst = {
static const char * const imx27_dt_board_compat[] __initconst = {
	"fsl,imx27",
	"fsl,imx27",
	NULL
	NULL
@@ -75,7 +64,6 @@ static const char * const imx27_dt_board_compat[] __initconst = {
DT_MACHINE_START(IMX27_DT, "Freescale i.MX27 (Device Tree Support)")
DT_MACHINE_START(IMX27_DT, "Freescale i.MX27 (Device Tree Support)")
	.map_io		= mx27_map_io,
	.map_io		= mx27_map_io,
	.init_early	= imx27_init_early,
	.init_early	= imx27_init_early,
	.init_irq	= mx27_init_irq,
	.init_late	= imx27_pm_init,
	.init_late	= imx27_pm_init,
	.dt_compat	= imx27_dt_board_compat,
	.dt_compat	= imx27_dt_board_compat,
MACHINE_END
MACHINE_END
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