Commit e2be5955 authored by Yazen Ghannam's avatar Yazen Ghannam Committed by Borislav Petkov
Browse files

EDAC/amd64: Add support for AMD Family 19h Models 10h-1Fh and A0h-AFh 



Add a new family type for AMD Family 19h Models 10h to 1Fh. Use this new
family type for Models A0h to AFh also.

Increase the maximum number of controllers from 8 to 12.

Signed-off-by: default avatarYazen Ghannam <yazen.ghannam@amd.com>
Signed-off-by: default avatarBorislav Petkov <bp@suse.de>
Link: https://lore.kernel.org/r/20211208174356.1997855-3-yazen.ghannam@amd.com
parent f9571124

drivers/edac/amd64_edac.c

+20 −1
Original line number Diff line number Diff line
@@ -2650,6 +2650,16 @@ static struct amd64_family_type family_types[] = { 
			.dbam_to_cs		= f17_addr_mask_to_cs_size,

		}

	},

	[F19_M10H_CPUS] = {

		.ctl_name = "F19h_M10h",

		.f0_id = PCI_DEVICE_ID_AMD_19H_M10H_DF_F0,

		.f6_id = PCI_DEVICE_ID_AMD_19H_M10H_DF_F6,

		.max_mcs = 12,

		.ops = {

			.early_channel_count	= f17_early_channel_count,

			.dbam_to_cs		= f17_addr_mask_to_cs_size,

		}

	},

};



/*
@@ -3687,11 +3697,20 @@ static struct amd64_family_type *per_family_init(struct amd64_pvt *pvt) 
		break;



	case 0x19:

		if (pvt->model >= 0x20 && pvt->model <= 0x2f) {

		if (pvt->model >= 0x10 && pvt->model <= 0x1f) {

			fam_type = &family_types[F19_M10H_CPUS];

			pvt->ops = &family_types[F19_M10H_CPUS].ops;

			break;

		} else if (pvt->model >= 0x20 && pvt->model <= 0x2f) {

			fam_type = &family_types[F17_M70H_CPUS];

			pvt->ops = &family_types[F17_M70H_CPUS].ops;

			fam_type->ctl_name = "F19h_M20h";

			break;

		} else if (pvt->model >= 0xa0 && pvt->model <= 0xaf) {

			fam_type = &family_types[F19_M10H_CPUS];

			pvt->ops = &family_types[F19_M10H_CPUS].ops;

			fam_type->ctl_name = "F19h_MA0h";

			break;

		}

		fam_type	= &family_types[F19_CPUS];

		pvt->ops	= &family_types[F19_CPUS].ops;

drivers/edac/amd64_edac.h

+4 −1
Original line number Diff line number Diff line
@@ -96,7 +96,7 @@ 
/* Hardware limit on ChipSelect rows per MC and processors per system */

#define NUM_CHIPSELECTS			8

#define DRAM_RANGES			8

#define NUM_CONTROLLERS			8

#define NUM_CONTROLLERS			12



#define ON true

#define OFF false
@@ -126,6 +126,8 @@ 
#define PCI_DEVICE_ID_AMD_17H_M70H_DF_F6 0x1446

#define PCI_DEVICE_ID_AMD_19H_DF_F0	0x1650

#define PCI_DEVICE_ID_AMD_19H_DF_F6	0x1656

#define PCI_DEVICE_ID_AMD_19H_M10H_DF_F0 0x14ad

#define PCI_DEVICE_ID_AMD_19H_M10H_DF_F6 0x14b3



/*

 * Function 1 - Address Map
@@ -298,6 +300,7 @@ enum amd_families { 
	F17_M60H_CPUS,

	F17_M70H_CPUS,

	F19_CPUS,

	F19_M10H_CPUS,

	NUM_FAMILIES,

};