Commit e2bd9c76 authored by Jacob Keller's avatar Jacob Keller Committed by David S. Miller
Browse files

ptp: convert remaining drivers to adjfine interface 



Convert all remaining drivers that still use .adjfreq to the newer .adjfine
implementation. These drivers are not straightforward, as they use
non-standard methods of programming their hardware. They are all converted
to use scaled_ppm_to_ppb to get the parts per billion value that their
logic depends on.

Signed-off-by: default avatarJacob Keller <jacob.e.keller@intel.com>
Cc: Ariel Elior <aelior@marvell.com>
Cc: Sudarsana Kalluru <skalluru@marvell.com>
Cc: Manish Chopra <manishc@marvell.com>
Cc: Derek Chickles <dchickles@marvell.com>
Cc: Satanand Burla <sburla@marvell.com>
Cc: Felix Manlunas <fmanlunas@marvell.com>
Cc: Raju Rangoju <rajur@chelsio.com>
Cc: Joakim Zhang <qiangqing.zhang@nxp.com>
Cc: Edward Cree <ecree.xilinx@gmail.com>
Cc: Martin Habets <habetsm.xilinx@gmail.com>
Cc: Richard Cochran <richardcochran@gmail.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent a29c132f

drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c

+5 −4
Original line number Diff line number Diff line
@@ -13671,19 +13671,20 @@ static int bnx2x_send_update_drift_ramrod(struct bnx2x *bp, int drift_dir, 
	return bnx2x_func_state_change(bp, &func_params);

}



static int bnx2x_ptp_adjfreq(struct ptp_clock_info *ptp, s32 ppb)

static int bnx2x_ptp_adjfine(struct ptp_clock_info *ptp, long scaled_ppm)

{

	struct bnx2x *bp = container_of(ptp, struct bnx2x, ptp_clock_info);

	int rc;

	int drift_dir = 1;

	int val, period, period1, period2, dif, dif1, dif2;

	int best_dif = BNX2X_MAX_PHC_DRIFT, best_period = 0, best_val = 0;

	s32 ppb = scaled_ppm_to_ppb(scaled_ppm);



	DP(BNX2X_MSG_PTP, "PTP adjfreq called, ppb = %d\n", ppb);

	DP(BNX2X_MSG_PTP, "PTP adjfine called, ppb = %d\n", ppb);



	if (!netif_running(bp->dev)) {

		DP(BNX2X_MSG_PTP,

		   "PTP adjfreq called while the interface is down\n");

		   "PTP adjfine called while the interface is down\n");

		return -ENETDOWN;

	}
@@ -13818,7 +13819,7 @@ void bnx2x_register_phc(struct bnx2x *bp) 
	bp->ptp_clock_info.n_ext_ts = 0;

	bp->ptp_clock_info.n_per_out = 0;

	bp->ptp_clock_info.pps = 0;

	bp->ptp_clock_info.adjfreq = bnx2x_ptp_adjfreq;

	bp->ptp_clock_info.adjfine = bnx2x_ptp_adjfine;

	bp->ptp_clock_info.adjtime = bnx2x_ptp_adjtime;

	bp->ptp_clock_info.gettime64 = bnx2x_ptp_gettime;

	bp->ptp_clock_info.settime64 = bnx2x_ptp_settime;

drivers/net/ethernet/cavium/liquidio/lio_main.c

+7 −4
Original line number Diff line number Diff line
@@ -1512,14 +1512,17 @@ static void free_netsgbuf_with_resp(void *buf) 
}



/**

 * liquidio_ptp_adjfreq - Adjust ptp frequency

 * liquidio_ptp_adjfine - Adjust ptp frequency

 * @ptp: PTP clock info

 * @ppb: how much to adjust by, in parts-per-billion

 * @scaled_ppm: how much to adjust by, in scaled parts-per-million

 *

 * Scaled parts per million is ppm with a 16-bit binary fractional field.

 */

static int liquidio_ptp_adjfreq(struct ptp_clock_info *ptp, s32 ppb)

static int liquidio_ptp_adjfine(struct ptp_clock_info *ptp, long scaled_ppm)

{

	struct lio *lio = container_of(ptp, struct lio, ptp_info);

	struct octeon_device *oct = (struct octeon_device *)lio->oct_dev;

	s32 ppb = scaled_ppm_to_ppb(scaled_ppm);

	u64 comp, delta;

	unsigned long flags;

	bool neg_adj = false;
@@ -1643,7 +1646,7 @@ static void oct_ptp_open(struct net_device *netdev) 
	lio->ptp_info.n_ext_ts = 0;

	lio->ptp_info.n_per_out = 0;

	lio->ptp_info.pps = 0;

	lio->ptp_info.adjfreq = liquidio_ptp_adjfreq;

	lio->ptp_info.adjfine = liquidio_ptp_adjfine;

	lio->ptp_info.adjtime = liquidio_ptp_adjtime;

	lio->ptp_info.gettime64 = liquidio_ptp_gettime;

	lio->ptp_info.settime64 = liquidio_ptp_settime;

drivers/net/ethernet/chelsio/cxgb4/cxgb4_ptp.c

+8 −5
Original line number Diff line number Diff line
@@ -194,17 +194,20 @@ int cxgb4_ptp_redirect_rx_packet(struct adapter *adapter, struct port_info *pi) 
}



/**

 * cxgb4_ptp_adjfreq - Adjust frequency of PHC cycle counter

 * cxgb4_ptp_adjfine - Adjust frequency of PHC cycle counter

 * @ptp: ptp clock structure

 * @ppb: Desired frequency change in parts per billion

 * @scaled_ppm: Desired frequency in scaled parts per billion

 *

 * Adjust the frequency of the PHC cycle counter by the indicated ppb from

 * Adjust the frequency of the PHC cycle counter by the indicated amount from

 * the base frequency.

 *

 * Scaled parts per million is ppm with a 16-bit binary fractional field.

 */

static int cxgb4_ptp_adjfreq(struct ptp_clock_info *ptp, s32 ppb)

static int cxgb4_ptp_adjfine(struct ptp_clock_info *ptp, long scaled_ppm)

{

	struct adapter *adapter = (struct adapter *)container_of(ptp,

				   struct adapter, ptp_clock_info);

	s32 ppb = scaled_ppm_to_ppb(scaled_ppm);

	struct fw_ptp_cmd c;

	int err;
@@ -404,7 +407,7 @@ static const struct ptp_clock_info cxgb4_ptp_clock_info = { 
	.n_ext_ts       = 0,

	.n_per_out      = 0,

	.pps            = 0,

	.adjfreq        = cxgb4_ptp_adjfreq,

	.adjfine        = cxgb4_ptp_adjfine,

	.adjtime        = cxgb4_ptp_adjtime,

	.gettime64      = cxgb4_ptp_gettime,

	.settime64      = cxgb4_ptp_settime,

drivers/net/ethernet/freescale/fec_ptp.c

+8 −5
Original line number Diff line number Diff line
@@ -338,18 +338,21 @@ void fec_ptp_start_cyclecounter(struct net_device *ndev) 
}



/**

 * fec_ptp_adjfreq - adjust ptp cycle frequency

 * fec_ptp_adjfine - adjust ptp cycle frequency

 * @ptp: the ptp clock structure

 * @ppb: parts per billion adjustment from base

 * @scaled_ppm: scaled parts per million adjustment from base

 *

 * Adjust the frequency of the ptp cycle counter by the

 * indicated ppb from the base frequency.

 * indicated amount from the base frequency.

 *

 * Scaled parts per million is ppm with a 16-bit binary fractional field.

 *

 * Because ENET hardware frequency adjust is complex,

 * using software method to do that.

 */

static int fec_ptp_adjfreq(struct ptp_clock_info *ptp, s32 ppb)

static int fec_ptp_adjfine(struct ptp_clock_info *ptp, long scaled_ppm)

{

	s32 ppb = scaled_ppm_to_ppb(scaled_ppm);

	unsigned long flags;

	int neg_adj = 0;

	u32 i, tmp;
@@ -742,7 +745,7 @@ void fec_ptp_init(struct platform_device *pdev, int irq_idx) 
	fep->ptp_caps.n_per_out = 1;

	fep->ptp_caps.n_pins = 0;

	fep->ptp_caps.pps = 1;

	fep->ptp_caps.adjfreq = fec_ptp_adjfreq;

	fep->ptp_caps.adjfine = fec_ptp_adjfine;

	fep->ptp_caps.adjtime = fec_ptp_adjtime;

	fep->ptp_caps.gettime64 = fec_ptp_gettime;

	fep->ptp_caps.settime64 = fec_ptp_settime;

drivers/net/ethernet/qlogic/qede/qede_ptp.c

+8 −5
Original line number Diff line number Diff line
@@ -28,16 +28,19 @@ struct qede_ptp { 
};



/**

 * qede_ptp_adjfreq() - Adjust the frequency of the PTP cycle counter.

 * qede_ptp_adjfine() - Adjust the frequency of the PTP cycle counter.

 *

 * @info: The PTP clock info structure.

 * @ppb: Parts per billion adjustment from base.

 * @scaled_ppm: Scaled parts per million adjustment from base.

 *

 * Scaled parts per million is ppm with a 16-bit binary fractional field.

 *

 * Return: Zero on success, negative errno otherwise.

 */

static int qede_ptp_adjfreq(struct ptp_clock_info *info, s32 ppb)

static int qede_ptp_adjfine(struct ptp_clock_info *info, long scaled_ppm)

{

	struct qede_ptp *ptp = container_of(info, struct qede_ptp, clock_info);

	s32 ppb = scaled_ppm_to_ppb(scaled_ppm);

	struct qede_dev *edev = ptp->edev;

	int rc;
@@ -47,7 +50,7 @@ static int qede_ptp_adjfreq(struct ptp_clock_info *info, s32 ppb) 
		rc = ptp->ops->adjfreq(edev->cdev, ppb);

		spin_unlock_bh(&ptp->lock);

	} else {

		DP_ERR(edev, "PTP adjfreq called while interface is down\n");

		DP_ERR(edev, "PTP adjfine called while interface is down\n");

		rc = -EFAULT;

	}

	__qede_unlock(edev);
@@ -462,7 +465,7 @@ int qede_ptp_enable(struct qede_dev *edev) 
	ptp->clock_info.n_ext_ts = 0;

	ptp->clock_info.n_per_out = 0;

	ptp->clock_info.pps = 0;

	ptp->clock_info.adjfreq = qede_ptp_adjfreq;

	ptp->clock_info.adjfine = qede_ptp_adjfine;

	ptp->clock_info.adjtime = qede_ptp_adjtime;

	ptp->clock_info.gettime64 = qede_ptp_gettime;

	ptp->clock_info.settime64 = qede_ptp_settime;