Commit e2932d1f authored by Shubhrajyoti Datta's avatar Shubhrajyoti Datta Committed by Borislav Petkov
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EDAC/synopsys: Read the error count from the correct register 



Currently, the error count is read wrongly from the status register. Read
the count from the proper error count register (ERRCNT).

  [ bp: Massage. ]

Fixes: b500b4a0 ("EDAC, synopsys: Add ECC support for ZynqMP DDR controller")
Signed-off-by: default avatarShubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
Signed-off-by: default avatarBorislav Petkov <bp@suse.de>
Acked-by: default avatarMichal Simek <michal.simek@xilinx.com>
Cc: <stable@vger.kernel.org>
Link: https://lore.kernel.org/r/20220414102813.4468-1-shubhrajyoti.datta@xilinx.com
parent ce522ba9

drivers/edac/synopsys_edac.c

+11 −5
Original line number Diff line number Diff line
@@ -164,6 +164,11 @@ 
#define ECC_STAT_CECNT_SHIFT		8

#define ECC_STAT_BITNUM_MASK		0x7F



/* ECC error count register definitions */

#define ECC_ERRCNT_UECNT_MASK		0xFFFF0000

#define ECC_ERRCNT_UECNT_SHIFT		16

#define ECC_ERRCNT_CECNT_MASK		0xFFFF



/* DDR QOS Interrupt register definitions */

#define DDR_QOS_IRQ_STAT_OFST		0x20200

#define DDR_QOSUE_MASK			0x4
@@ -423,15 +428,16 @@ static int zynqmp_get_error_info(struct synps_edac_priv *priv) 
	base = priv->baseaddr;

	p = &priv->stat;



	regval = readl(base + ECC_ERRCNT_OFST);

	p->ce_cnt = regval & ECC_ERRCNT_CECNT_MASK;

	p->ue_cnt = (regval & ECC_ERRCNT_UECNT_MASK) >> ECC_ERRCNT_UECNT_SHIFT;

	if (!p->ce_cnt)

		goto ue_err;



	regval = readl(base + ECC_STAT_OFST);

	if (!regval)

		return 1;



	p->ce_cnt = (regval & ECC_STAT_CECNT_MASK) >> ECC_STAT_CECNT_SHIFT;

	p->ue_cnt = (regval & ECC_STAT_UECNT_MASK) >> ECC_STAT_UECNT_SHIFT;

	if (!p->ce_cnt)

		goto ue_err;



	p->ceinfo.bitpos = (regval & ECC_STAT_BITNUM_MASK);



	regval = readl(base + ECC_CEADDR0_OFST);