Commit e233c733 authored by James Hogan's avatar James Hogan Committed by Ralf Baechle
Browse files

MIPS: Add and use CAUSEF_WP definition 



do_watch() clears bit 22 of cause without using a CAUSEF_* definition
from mipsregs.h. Add a definition for this bit (CAUSEF_WP) and make use
of it. Also use clear_c0_cause() instead of manual read/modify/write.

Signed-off-by: default avatarJames Hogan <james.hogan@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/12728/


Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent b0d8a082

arch/mips/include/asm/mipsregs.h

+2 −0
Original line number Diff line number Diff line
@@ -390,6 +390,8 @@ 
#define	 CAUSEF_IP7		(_ULCAST_(1)   << 15)

#define CAUSEB_FDCI		21

#define CAUSEF_FDCI		(_ULCAST_(1)   << 21)

#define CAUSEB_WP		22

#define CAUSEF_WP		(_ULCAST_(1)   << 22)

#define CAUSEB_IV		23

#define CAUSEF_IV		(_ULCAST_(1)   << 23)

#define CAUSEB_PCI		26

arch/mips/kernel/traps.c

+1 −4
Original line number Diff line number Diff line
@@ -1498,16 +1498,13 @@ asmlinkage void do_watch(struct pt_regs *regs) 
{

	siginfo_t info = { .si_signo = SIGTRAP, .si_code = TRAP_HWBKPT };

	enum ctx_state prev_state;

	u32 cause;



	prev_state = exception_enter();

	/*

	 * Clear WP (bit 22) bit of cause register so we don't loop

	 * forever.

	 */

	cause = read_c0_cause();

	cause &= ~(1 << 22);

	write_c0_cause(cause);

	clear_c0_cause(CAUSEF_WP);



	/*

	 * If the current thread has the watch registers loaded, save