Commit e2012600 authored by Rob Herring's avatar Rob Herring Committed by Will Deacon
Browse files

arm64: perf: Add userspace counter access disable switch 



Like x86, some users may want to disable userspace PMU counter
altogether. Add a sysctl 'perf_user_access' file to control userspace
counter access. The default is '0' which is disabled. Writing '1'
enables access.

Note that x86 supports globally enabling user access by writing '2' to
/sys/bus/event_source/devices/cpu/rdpmc. As there's not existing
userspace support to worry about, this shouldn't be necessary for Arm.
It could be added later if the need arises.

Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Arnaldo Carvalho de Melo <acme@kernel.org>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: linux-perf-users@vger.kernel.org
Acked-by: default avatarWill Deacon <will@kernel.org>
Reviewed-by: default avatarMark Rutland <mark.rutland@arm.com>
Signed-off-by: default avatarRob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211208201124.310740-4-robh@kernel.org


Signed-off-by: default avatarWill Deacon <will@kernel.org>
parent 82ff0c02

Documentation/admin-guide/sysctl/kernel.rst

+11 −0
Original line number Diff line number Diff line
@@ -905,6 +905,17 @@ enabled, otherwise writing to this file will return ``-EBUSY``. 
The default value is 8.





perf_user_access (arm64 only)

=================================



Controls user space access for reading perf event counters. When set to 1,

user space can read performance monitor counter registers directly.



The default value is 0 (access disabled).



See Documentation/arm64/perf.rst for more information.





pid_max

=======

arch/arm64/kernel/perf_event.c

+17 −0
Original line number Diff line number Diff line
@@ -286,6 +286,8 @@ static const struct attribute_group armv8_pmuv3_events_attr_group = { 
PMU_FORMAT_ATTR(event, "config:0-15");

PMU_FORMAT_ATTR(long, "config1:0");



static int sysctl_perf_user_access __read_mostly;



static inline bool armv8pmu_event_is_64bit(struct perf_event *event)

{

	return event->attr.config1 & 0x1;
@@ -1104,6 +1106,19 @@ static int armv8pmu_probe_pmu(struct arm_pmu *cpu_pmu) 
	return probe.present ? 0 : -ENODEV;

}



static struct ctl_table armv8_pmu_sysctl_table[] = {

	{

		.procname       = "perf_user_access",

		.data		= &sysctl_perf_user_access,

		.maxlen		= sizeof(unsigned int),

		.mode           = 0644,

		.proc_handler	= proc_dointvec_minmax,

		.extra1		= SYSCTL_ZERO,

		.extra2		= SYSCTL_ONE,

	},

	{ }

};



static int armv8_pmu_init(struct arm_pmu *cpu_pmu, char *name,

			  int (*map_event)(struct perf_event *event),

			  const struct attribute_group *events,
@@ -1136,6 +1151,8 @@ static int armv8_pmu_init(struct arm_pmu *cpu_pmu, char *name, 
	cpu_pmu->attr_groups[ARMPMU_ATTR_GROUP_CAPS] = caps ?

			caps : &armv8_pmuv3_caps_attr_group;



	register_sysctl("kernel", armv8_pmu_sysctl_table);



	return 0;

}