Commit e1deaa84 authored by Eric Chanudet's avatar Eric Chanudet Committed by Bjorn Andersson
Browse files

arm64: dts: qcom: sa8295p-adp: use sa8540p-pmics 



Include the dtsi to use a single pmic descriptions.
Both sa8295p-adp and sa8540p-adp have the same spmi pmic apparently.

Signed-off-by: default avatarEric Chanudet <echanude@redhat.com>
Reviewed-by: default avatarKonrad Dybcio <konrad.dybcio@linaro.org>
Tested-by: Andrew Halaney <ahalaney@redhat.com> # sa8540p-ride
Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221219191000.2570545-4-echanude@redhat.com
parent 650fed78

arch/arm64/boot/dts/qcom/sa8295p-adp.dts

+1 −78
Original line number Diff line number Diff line
@@ -11,6 +11,7 @@ 
#include <dt-bindings/spmi/spmi.h>



#include "sa8540p.dtsi"

#include "sa8540p-pmics.dtsi"



/ {

	model = "Qualcomm SA8295P ADP";
@@ -260,84 +261,6 @@ 
	status = "okay";

};



&spmi_bus {

	pm8450a: pmic@0 {

		compatible = "qcom,pm8150", "qcom,spmi-pmic";

		reg = <0x0 SPMI_USID>;

		#address-cells = <1>;

		#size-cells = <0>;



		rtc@6000 {

			compatible = "qcom,pm8941-rtc";

			reg = <0x6000>;

			reg-names = "rtc", "alarm";

			interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>;

			wakeup-source;

		};



		pm8450a_gpios: gpio@c000 {

			compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio";

			reg = <0xc000>;

			gpio-controller;

			gpio-ranges = <&pm8450a_gpios 0 0 10>;

			#gpio-cells = <2>;

			interrupt-controller;

			#interrupt-cells = <2>;

		};

	};



	pm8450c: pmic@4 {

		compatible = "qcom,pm8150", "qcom,spmi-pmic";

		reg = <0x4 SPMI_USID>;

		#address-cells = <1>;

		#size-cells = <0>;



		pm8450c_gpios: gpio@c000 {

			compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio";

			reg = <0xc000>;

			gpio-controller;

			gpio-ranges = <&pm8450c_gpios 0 0 10>;

			#gpio-cells = <2>;

			interrupt-controller;

			#interrupt-cells = <2>;

		};

	};



	pm8450e: pmic@8 {

		compatible = "qcom,pm8150", "qcom,spmi-pmic";

		reg = <0x8 SPMI_USID>;

		#address-cells = <1>;

		#size-cells = <0>;



		pm8450e_gpios: gpio@c000 {

			compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio";

			reg = <0xc000>;

			gpio-controller;

			gpio-ranges = <&pm8450e_gpios 0 0 10>;

			#gpio-cells = <2>;

			interrupt-controller;

			#interrupt-cells = <2>;

		};

	};



	pm8450g: pmic@c {

		compatible = "qcom,pm8150", "qcom,spmi-pmic";

		reg = <0xc SPMI_USID>;

		#address-cells = <1>;

		#size-cells = <0>;



		pm8450g_gpios: gpio@c000 {

			compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio";

			reg = <0xc000>;

			gpio-controller;

			gpio-ranges = <&pm8450g_gpios 0 0 10>;

			#gpio-cells = <2>;

			interrupt-controller;

			#interrupt-cells = <2>;

		};

	};

};



&ufs_mem_hc {

	reset-gpios = <&tlmm 228 GPIO_ACTIVE_LOW>;