Commit e1a29b28 authored by Yifan Zha's avatar Yifan Zha Committed by Alex Deucher
Browse files

drm/amdgpu: Skip access SDMA0_F32_CNTL in sdma_v6_0_enable under SRIOV 



[Why]
SDMA0_F32_CNTL is a PF_only regitser which will be blocked by L1.
RLCG will not program the register as well.

[How]
Skip to program SDMA0_F32_CNTL under SRIOV VF.

Signed-off-by: default avatarYifan Zha <Yifan.Zha@amd.com>
Acked-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 47a7470b

drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c

+3 −0
Original line number Diff line number Diff line
@@ -455,6 +455,9 @@ static void sdma_v6_0_enable(struct amdgpu_device *adev, bool enable) 
		sdma_v6_0_rlc_stop(adev);

	}



	if (amdgpu_sriov_vf(adev))

		return;



	for (i = 0; i < adev->sdma.num_instances; i++) {

		f32_cntl = RREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_F32_CNTL));

		f32_cntl = REG_SET_FIELD(f32_cntl, SDMA0_F32_CNTL, HALT, enable ? 0 : 1);