Commit e18d6152 authored by Paolo Bonzini's avatar Paolo Bonzini
Browse files

Merge tag 'kvm-riscv-6.1-1' of https://github.com/kvm-riscv/linux into HEAD

KVM/riscv changes for 6.1

- Improved instruction encoding infrastructure for
  instructions not yet supported by binutils
- Svinval support for both KVM Host and KVM Guest
- Zihintpause support for KVM Guest
- Zicbom support for KVM Guest
- Record number of signal exits as a VCPU stat
- Use generic guest entry infrastructure
parents fe4d9e4a b60ca697
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@@ -34,8 +34,8 @@ Example:
Use specific request line passing from dma
For example, MMC request line is 5

	sdhci: sdhci@98e00000 {
		compatible = "moxa,moxart-sdhci";
	mmc: mmc@98e00000 {
		compatible = "moxa,moxart-mmc";
		reg = <0x98e00000 0x5C>;
		interrupts = <5 0>;
		clocks = <&clk_apb>;
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@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: i.MX8M DDR Controller

maintainers:
  - Leonard Crestez <leonard.crestez@nxp.com>
  - Peng Fan <peng.fan@nxp.com>

description:
  The DDRC block is integrated in i.MX8M for interfacing with DDR based
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@@ -40,6 +40,7 @@ properties:
patternProperties:
  '^opp-?[0-9]+$':
    type: object
    additionalProperties: false

    properties:
      opp-hz: true
+1 −0
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@@ -19,6 +19,7 @@ properties:
patternProperties:
  '^opp-?[0-9]+$':
    type: object
    additionalProperties: false

    properties:
      opp-level: true
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@@ -148,7 +148,7 @@ You can do plain I2C transactions by using read(2) and write(2) calls.
You do not need to pass the address byte; instead, set it through
ioctl I2C_SLAVE before you try to access the device.

You can do SMBus level transactions (see documentation file smbus-protocol
You can do SMBus level transactions (see documentation file smbus-protocol.rst
for details) through the following functions::

  __s32 i2c_smbus_write_quick(int file, __u8 value);
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