Commit e18a9042 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm 

Pull more kvm updates from Paolo Bonzini:

 - Xen timer fixes

 - Documentation formatting fixes

 - Make rseq selftest compatible with glibc-2.35

 - Fix handling of illegal LEA reg, reg

 - Cleanup creation of debugfs entries

 - Fix steal time cache handling bug

 - Fixes for MMIO caching

 - Optimize computation of number of LBRs

 - Fix uninitialized field in guest_maxphyaddr < host_maxphyaddr path

* tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: (26 commits)
  KVM: x86/MMU: properly format KVM_CAP_VM_DISABLE_NX_HUGE_PAGES capability table
  Documentation: KVM: extend KVM_CAP_VM_DISABLE_NX_HUGE_PAGES heading underline
  KVM: VMX: Adjust number of LBR records for PERF_CAPABILITIES at refresh
  KVM: VMX: Use proper type-safe functions for vCPU => LBRs helpers
  KVM: x86: Refresh PMU after writes to MSR_IA32_PERF_CAPABILITIES
  KVM: selftests: Test all possible "invalid" PERF_CAPABILITIES.LBR_FMT vals
  KVM: selftests: Use getcpu() instead of sched_getcpu() in rseq_test
  KVM: selftests: Make rseq compatible with glibc-2.35
  KVM: Actually create debugfs in kvm_create_vm()
  KVM: Pass the name of the VM fd to kvm_create_vm_debugfs()
  KVM: Get an fd before creating the VM
  KVM: Shove vcpu stats_id init into kvm_vcpu_init()
  KVM: Shove vm stats_id init into kvm_create_vm()
  KVM: x86/mmu: Add sanity check that MMIO SPTE mask doesn't overlap gen
  KVM: x86/mmu: rename trace function name for asynchronous page fault
  KVM: x86/xen: Stop Xen timer before changing IRQ
  KVM: x86/xen: Initialize Xen timer only once
  KVM: SVM: Disable SEV-ES support if MMIO caching is disable
  KVM: x86/mmu: Fully re-evaluate MMIO caching when SPTE masks change
  KVM: x86: Tag kvm_mmu_x86_module_init() with __init
  ...
parents 2ae08b36 19a7cc81

Documentation/virt/kvm/api.rst

+5 −5
Original line number Diff line number Diff line
@@ -8262,13 +8262,13 @@ dump related UV data. Also the vcpu ioctl `KVM_S390_PV_CPU_COMMAND` is 
available and supports the `KVM_PV_DUMP_CPU` subcommand.



8.38 KVM_CAP_VM_DISABLE_NX_HUGE_PAGES

---------------------------

-------------------------------------



:Capability KVM_CAP_VM_DISABLE_NX_HUGE_PAGES

:Capability: KVM_CAP_VM_DISABLE_NX_HUGE_PAGES

:Architectures: x86

:Type: vm

:Parameters: arg[0] must be 0.

:Returns 0 on success, -EPERM if the userspace process does not

:Returns: 0 on success, -EPERM if the userspace process does not

          have CAP_SYS_BOOT, -EINVAL if args[0] is not 0 or any vCPUs have been

          created.

arch/x86/include/asm/kvm_host.h

+1 −1
Original line number Diff line number Diff line
@@ -1704,7 +1704,7 @@ static inline int kvm_arch_flush_remote_tlb(struct kvm *kvm) 
#define kvm_arch_pmi_in_guest(vcpu) \

	((vcpu) && (vcpu)->arch.handling_intr_from_guest)



void kvm_mmu_x86_module_init(void);

void __init kvm_mmu_x86_module_init(void);

int kvm_mmu_vendor_module_init(void);

void kvm_mmu_vendor_module_exit(void);

arch/x86/kvm/emulate.c

+5 −1
Original line number Diff line number Diff line
@@ -4578,6 +4578,10 @@ static const struct mode_dual mode_dual_63 = { 
	N, I(DstReg | SrcMem32 | ModRM | Mov, em_movsxd)

};



static const struct instr_dual instr_dual_8d = {

	D(DstReg | SrcMem | ModRM | NoAccess), N

};



static const struct opcode opcode_table[256] = {

	/* 0x00 - 0x07 */

	F6ALU(Lock, em_add),
@@ -4634,7 +4638,7 @@ static const struct opcode opcode_table[256] = { 
	I2bv(DstMem | SrcReg | ModRM | Mov | PageTable, em_mov),

	I2bv(DstReg | SrcMem | ModRM | Mov, em_mov),

	I(DstMem | SrcNone | ModRM | Mov | PageTable, em_mov_rm_sreg),

	D(ModRM | SrcMem | NoAccess | DstReg),

	ID(0, &instr_dual_8d),

	I(ImplicitOps | SrcMem16 | ModRM, em_mov_sreg_rm),

	G(0, group1A),

	/* 0x90 - 0x97 */

arch/x86/kvm/lapic.c

+5 −3
Original line number Diff line number Diff line
@@ -2284,10 +2284,12 @@ void kvm_apic_write_nodecode(struct kvm_vcpu *vcpu, u32 offset) 
	struct kvm_lapic *apic = vcpu->arch.apic;

	u64 val;



	if (apic_x2apic_mode(apic))

		kvm_lapic_msr_read(apic, offset, &val);

	else

	if (apic_x2apic_mode(apic)) {

		if (KVM_BUG_ON(kvm_lapic_msr_read(apic, offset, &val), vcpu->kvm))

			return;

	} else {

		val = kvm_lapic_get_reg(apic, offset);

	}



	/*

	 * ICR is a single 64-bit register when x2APIC is enabled.  For legacy

arch/x86/kvm/mmu.h

+2 −0
Original line number Diff line number Diff line
@@ -6,6 +6,8 @@ 
#include "kvm_cache_regs.h"

#include "cpuid.h"



extern bool __read_mostly enable_mmio_caching;



#define PT_WRITABLE_SHIFT 1

#define PT_USER_SHIFT 2